參數(shù)資料
型號(hào)： CXD3000R
廠商： Sony Corporation
元件分類： 數(shù)字信號(hào)處理
英文描述： CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述： CD數(shù)字信號(hào)處理器，具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù)： 74/129頁
文件大小： 1264K
代理商： CXD3000R
– 74 –
CXD3000R
§4-5. Digital Out
There are three Digital Out: the type 1 format for broadcasting stations, the type 2 form 1 format for home use,
and the type 2 form 2 format for the manufacture of software.
The CXD3000R supports type 2 form 1.
The channel status clock accuracy is automatically set to level
II
when using the crystal clock and to level
III
in
CAV-W mode. In addition, Sub Q data which are matched twice in succession after a CRC check are input to
the first four bits (bits 0 to 3).
DOUT is output when the crystal is 34MHz and DSPB is set to 1 with XTSL high in CLV-N or CLV-W mode.
Therefore, set MD2 to 0 and turn DOUT off.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0/1
0
0
0
ID0
ID1 COPY Emph
0
0
0
0
1
0
0
0
0
0
0
0
From sub Q
0
16
32
48
176
Sub Q control bits that matched twice with CRCOK
Digital Out C bit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
VPON: 1 Crystal: 0
Bits 0 to 3
Bit 29
Table 4-6.
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