參數(shù)資料
型號: CXD3000R
廠商: Sony Corporation
元件分類: 數(shù)字信號處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述: CD數(shù)字信號處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù): 110/129頁
文件大?。?/td> 1264K
代理商: CXD3000R
– 110 –
CXD3000R
$3A (preset: $3A 00 00)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
FBON FBSS FBUP FBV1 FBV0
0
TJD0 FPS1 FPS0 TPS1 TPS0
0
SJHD INBK MTI0
FBON:
FBIAS (focus bias) register addition (on/off)
The FBIAS register value is added to the signal loaded into the FCS In register by FBON = 1
(on).
FBIAS (focus bias) register/counter switching
FBSS = 0: register, FBSS = 1: counter.
FBIAS (focus bias) counter up/down operation switching
This performs counter up/down control when FBSS = 1. FBUP = 0: down counter,
FBUP = 1: up counter.
FBIAS (focus bias) counter voltage switching
The number of FCS BIAS count-up/-down steps per cycle is decided by these bits.
FBSS:
FBUP:
FBV1, FBV0:
TJD0:
This sets the tracking servo filter data RAM to 0 when switched from track jump to servo on
only when SFJP = 1 (during surf jump operation).
Gain setting when transferring data from the focus filter to the PWM block.
Gain setting when transferring data from the tracking filter to the PWM block.
This is effective for increasing the overall gain in order to widen the servo band.
Operation when FPS1, FPS0 (TPS1, TPS0) = 00 is the same as usual (7-bit shift). However,
6dB, 12dB and 18dB can be selected independently for focus and tracking by setting the
relative gain to 0dB when FPS1, FPS0 (TPS1, TPS0) = 00.
FPS1, FPS0:
TPS1, TPS0:
SJHD:
INBK:
This holds the tracking filter output at the value when surf jump starts during surf jump.
When INBK = 0 (off), the brake circuit masks the tracking drive signal with TRKCNCL which is
generated by taking the MIRR signal at the TZC edge. When INBK = 1 (on), the tracking filter
input is masked instead of the drive output.
The tracking filter input is masked when the MIRR signal is high by setting MTI0 = 1 (on).
MTI0:
The counter changes once for each
sampling cycle of the focus servo filter.
When MCK is 128Fs, the sampling
frequency is 88.2kHz. When converted
to FE input, 1 step is approximately 1/29
×
V
DD
/2, V
DD
= supply voltage.
FBV1
0
0
1
1
0
1
0
1
1
2
4
8
FBV0
Number of steps per cycle
FPS1
0
0
1
1
FPS0
0
1
0
1
0dB
+6dB
+12dB
+18dB
Relative gain
TPS1
0
0
1
1
TPS0
0
1
0
1
0dB
+6dB
+12dB
+18dB
Relative gain
: preset
: preset
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