參數(shù)資料
型號: CXD2721Q-1
廠商: Sony Corporation
元件分類: 數(shù)字信號處理
英文描述: Single-Chip Digital Signal Processor for Karaoke
中文描述: 單芯片數(shù)字信號處理器的卡拉OK
文件頁數(shù): 27/70頁
文件大?。?/td> 941K
代理商: CXD2721Q-1
– 27 –
CXD2721Q-1
6. Setup Register
When the setup register is selected in the microcomputer interface transfer mode, the following settings are
possible for the serial audio interface and DAC.
Data
section bit
Control
When system reset is Low
SQ23 to 14,
SQ12
SQ13
SQ11
SQ10
SQ09
SQ08
SQ07
SQ06, 05
SQ04
SQ03
SQ02, 01
SQ00
Reserve bit
DAC output selection
LRCK format
LRCK polarity selection
BCK polarity selection
relative to LRCK edge
SI data order
SI frontward/rearward
truncation
SI data word length
SO data order
SO frontward/rearward
truncation
SO data word length
DAC forced mute
Must be Low for setup register settings
to change
0: Built-in LPF used
1: External LPF used (PWM output)
0: Normal
1: IIS
0: Lch High
1: Lch Low
0: Falling edge
1: Rising edge
0: MSB first
1: LSB first
(24-bit rearward truncation only)
0: Frontward truncation
(valid only for MSB first/24 bits/32 slots)
1: Rearward truncation
SQ06
0
0
1
1
SQ05
0: 16 bits
1: 18 bits
0: 20 bits
1: 24 bits
0: MSB first
1: LSB first
0: Frontward truncation
1: Rearward truncation
SQ02
0
0
1
1
SQ01
0: 16 bit
1: 18 bit
0: 20 bit
1: 24 bit
0: ON
1: OFF
All Low
Built-in LPF
Normal
Lch High
Falling edge
MSB first
Frontward truncation
16 bits
LSB first
Frontward truncation
16 bits
ON
Table 6-1.
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