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– 6 –
CXD2548R
Focus drive output.
Digital power supply.
Track count signal output.
GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
If GFS is low eight consecutive samples, this pin outputs low.
Spindle motor servo control output.
Spindle motor servo control output.
Disc innermost track detection signal input.
2/3-frequency division output for Pins 103 and 104.
Digital servo reference clock input.
Crystal selection input. Low when the crystal is 16.9344MHz; high when the
crystal is 33.8688MHz.
4.2336MHz output.
D/A interface. Word clock f = 2Fs
Digital power supply.
D/A interface. LR clock f = Fs
LR clock input to DAC (48-bit slot).
D/A interface. Serial data. (two's complement, MSB first)
Audio data input to DAC (48-bit slot).
D/A interface. Bit clock.
Bit clock input to DAC (48-bit slot).
Outputs a high signal when the playback disc has emphasis, and a low
signal when there is no emphasis.
DAC de-emphasis ON/OFF. (high = on, low = off)
Digital GND.
L ch, analog GND.
L ch, analog power supply.
L ch, analog output.
L ch, operational amplifier input.
L ch, LINE output.
L ch, analog GND.
Master clock analog power supply.
Master clock 16.9344MHz crystal oscillation circuit input, or 33.8688MHz input.
Master clock 16.9344MHz crystal oscillation circuit output.
Master clock analog GND.
R ch, analog GND.
R ch, LINE output.
R ch, operational amplifier input.
R ch, analog output.
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
1, 0
Analog
Analog
1, 0
Analog
Analog
O
O
O
O
O
I
O
I
I
O
O
O
I
O
I
O
I
O
I
O
I
O
I
O
O
I
O
FRDR
V
DD
2
COUT
LOCK
MDS
MDP
SSTP
FSTO
FSTI
XTSL
C4M
WDCK
V
DD
3
LRCK
LRCKI
PCMD
PCMDI
BCK
BCKI
EMPH
EMPHI
Vss3
AVss1
AV
DD
1
AOUT1
AIN1
LOUT1
AVss1
XV
DD
XTAI
XTAO
XVss
AVss2
LOUT2
AIN2
AOUT2
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
Pin
No.
Symbol
I/O
Description