參數(shù)資料
型號： CS5530-ISZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 1/36頁
文件大?。?/td> 0K
描述： IC ADC 24BIT 1CH W/LNA 20SSOP
標準包裝： 66
位數(shù)： 24
采樣率（每秒）： 3.84k
數(shù)據(jù)接口： 串行
轉換器數(shù)目： 1
功率耗散（最大）： 45mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應商設備封裝： 20-SSOP
包裝： 管件
輸入數(shù)目和類型： 1 個差分，單極；1 個差分，雙極
產(chǎn)品目錄頁面： 755 (CN2011-ZH PDF)
配用： 598-1158-ND - BOARD EVAL FOR CS5530
其它名稱： 598-1283-5
Copyright
Cirrus Logic, Inc. 2009
(All Rights Reserved)
http://www.cirrus.com
CS5530
24-bit ADC with Ultra-low-noise Amplifier
Features & Description
Chopper-stabilized Instrumentation
Amplifier, 64X
12 nV/
√Hz @ 0.1 Hz (No 1/f noise)
1200 pA Input Current
Digital Gain Scaling up to 40x
Delta-sigma Analog-to-digital Converter
Linearity Error: 0.0015% FS
Noise Free Resolution: Up to 19 bits
Scalable VREF Input: Up to Analog Supply
Simple Three-wire Serial Interface
SPI and Microwire Compatible
Schmitt-trigger on Serial Clock (SCLK)
Onboard Offset and Gain Calibration
Registers
Selectable Word Rates: 6.25 to 3,840 Sps
Selectable 50 or 60 Hz Rejection
Power Supply Configurations
VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V
VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V
VA+ = +3 V; VA- = -3 V; VD+ = +3 V
General Description
The CS5530 is a highly integrated
ΔΣ Analog-to-Digital
Converter (ADC) which uses charge-balance techniques
to achieve 24-bit performance. The ADC is optimized for
measuring low-level unipolar or bipolar signals in weigh
scale,
process
control,
scientific,
and
medical
applications.
To accommodate these applications, the ADC includes
a very-low-noise, chopper-stabilized instrumentation
amplifier (12 nV/
√Hz @ 0.1 Hz) with a gain of 64X. This
device also includes a fourth-order
ΔΣ modulator fol-
lowed by a digital filter which provides twenty selectable
output word rates of 6.25, 7.5, 12.5, 15, 25, 30, 50, 60, 100,
120, 200, 240, 400, 480, 800, 960, 1600, 1920, 3200, and
3840 Sps (MCLK = 4.9152 MHz).
To ease communication between the ADC and a micro-
controller, the converter includes a simple three-wire se-
rial interface which is SPI and Microwire compatible with
a Schmitt-trigger input on the serial clock (SCLK).
High dynamic range, programmable output rates, and
flexible power supply options make this device an ideal
solution
for
weigh
scale
and
process
control
applications.
ORDERING INFORMATION
VA+
C1
C2
VREF+
VREF-
VD+
DIFFERENTIAL
4TH ORDER
ΔΣ
MODULATOR
PROGRAMMABLE
SINC FIR FILTER
AIN1+
AIN1-
SERIAL
INTERFACE
LATCH
CLOCK
GENERATOR
CALIBRATION
SRAM/CONTROL
LOGIC
DGND
CS
SDI
SDO
SCLK
OSC2
OSC1
A1
A0
VA-
64X
NOV ‘09
DS742F3
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