參數(shù)資料
型號(hào): CS51220ED16
英文描述: Analog IC
中文描述: 模擬IC
文件頁(yè)數(shù): 13/16頁(yè)
文件大小: 184K
代理商: CS51220ED16
CS51220
http://onsemi.com
6
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
16 Lead SO Narrow
PIN SYMBOL
FUNCTION
1
VO
Logic output connecting to external gate driver.
2
GND
Ground.
3
VCC
Supply Voltage.
4
VREF
3.3 V reference voltage output.
5
ISET
Voltage at this pin sets pulse–by–pulse overcurrent thresh-
old. When the ISENSE exceeds ISET for a sustained period of
time, a sink current is generated at this pin. Along with exter-
nal resistors, this current provides a foldback overcurrent
threshold. The sink current is disabled periodically for restart.
6
ISENSE
Current sense input for overcurrent protection.
7
OV
Overvoltage protection monitor.
8
UV
Undervoltage protection monitor.
9
CT
Timing capacitor CT determines oscillator frequency.
10
SYNCI
By applying sync pulses to this pin, the IC can be synchro-
nized to frequencies ranging from 25% slower to several
times faster than the internal oscillator frequency.
11
DISABLE
Disable mode input pin. A voltage greater than 3.0 V turns off
the whole IC.
12
FF
Feed forward input for PWM ramp. This pin allows external
connection to make the ramp adjustable to the input line.
13
COMP
This pin carries feedback error signal from an external ampli-
fier. Internally, it connects to the PWM controller.
14
SS
A capacitor is connected to this pin for Soft Start and soft
hiccup timing.
15
VSD
The voltage at this pin programs the delay of the SYNCO
output in reference to the internal oscillator.
16
SYNCO
Sync output.
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