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參數(shù)資料
| 型號(hào)： | CS19202CBI30 |
| 廠商： | Applied Micro Circuits Corp. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 49K |
| 代理商： | CS19202CBI30 |
AMCC
Production Release Information
- The information con-
tained in this document is about a product in its fully tested
and characterized stage. All features described herein are
supported. Contact AMCC for updates to this document and
the latest product status.
Features
General Description
GANGES
STS-192 SONET/SDH FRAMER AND POS/ATM MAPPER
S19202 Block Diagram
PRODUCT BRIEF
Part Number - S19202CBI30
Product Brief Revision 3.1 - January 2002
Supports full duplex mapping of ATM cells or packets for a
single STS-192c/AU-4-64c, four STS-48c/AU-4-16c or six-
teen STS-12c/AU-4-4c SONET/SDH payloads.
Supports a single STS-192/STM-64 or quad STS-48/STM-
16 line interfaces on the line side and on the protection
port. Each STS-48/STM-16 can support a concatenated
payload or can be channelized down to STS-12c/AU-4-4c.
Terminates and generates SONET/SDH section, line, &
path layers on the line side and APS port, with transport/
section E1, E2, F1 and DCC overhead interfaces in both
transmit and receive directions.
Supports independent loop timing when in quad STS-48/
STM-16 mode.
Supports protection switching (APS) between two Ganges
devices or between two fiber optics modules
Provides an Optical Internetworking Forum (OIF) SFI-4
compliant 622.08 MHz, 16-bit bus LVDS interface on the
line side in both the TX and RX directions.
Provides a 64-bit, 200 MHz FlexBus 4 system interface
that supports the transfer of either packets or ATM cells.
Support mixed ATM and POS data termination, config-
urable on a per-tributary basis
16-bit synchronous microprocessor interface for configura-
tion, control, and status monitoring.
Packaged in a 624-pin CBGA.
Implemented in .18 micron, 1.8V and 2.5V technology.
The Ganges IC is a highly integrated VLSI device that pro-
vides full duplex mapping of Packets or ATM cells into
SONET/SDH payloads at rates up to 9.95Gb/s.
Ganges provides full section and line overhead processing
for either a single STS-192/STM-64, or four STS-48/STM-16.
It supports framing, scrambling and descrambling, alarm sig-
nal insertion and detection, and bit interleaved parity (B1/B2)
processing. It also provides path overhead processing for
STS-192c/AU-4-64c, STS-48c/AU-4-16c or STS-12c/AU-4-
4c SONET/SDH payloads and includes bit interleaved parity
(B3) processing.
The automatic protection switching (APS) port of the Ganges
supports generation and termination of SONET/SDH section
and line, as well as TOH insertion and extraction. This allows
inter-device protection switching between two Ganges
devices or intra-device protection between two fiber optics
modules.
The Ganges is SONET/SDH standards compliant with
Bellcore GR-253, ITU G.707, and ANSI T1.105 -1995.
Applications
Core ATM switches and IP Routers (POS)
ATM, POS and Frame Relay line cards in Edge and Metro
Switches
Direct Mapping of any traffic type in SONET/SDH STS-192/
STM-64 and STS-48/STM-16 payloads
L
RX_DATA_IN[15:0]
RX_CLK_IN_[1:4]
SRX_DATA_OUT[63:0]
LBK
MON.
x4
STX_DATA_IN[63:0]
TX_DATA_OUT[15:0]
SPE/VC
GENERATOR
POH
MONITOR
POINTER
INTERPRETER
LOC
TX_CLK_OUT[1:4]
T
T
T
Proc
HD/
HDLC /ATM
Proc
Control
Control
SEL
D
A
C
W
R
B
I
MICROPROCESSOR I/F
R
A
P
S
E
L
P
FRM
x4
MUX
R
R
TOH INSERT
FRFRx4
R
INTRFC/
ATM/POS
FIFO
GENPOH
P
P
x16
x16
x16
x16
x16
x16
x16
x16
INTRFC/
ATM/POS
FIFO
S
S
S
R
R
U
G
T
T
T
T
T
T
JTAG
RX PROT
PROT TX
FR GEN
x4
R
P
P
R
P
P
P
TOH EXTRACT
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