參數(shù)資料
型號: CH7009A
廠商: Electronic Theatre Controls, Inc.
英文描述: Chrontel CH7009 DVI / TV Output Device
中文描述: 昆泰CH7009和DVI / TV輸出設(shè)備
文件頁數(shù): 27/46頁
文件大小: 580K
代理商: CH7009A
201-0000-035 Rev 1.1, 5/8/2000
27
CHRONTEL
Table 14: Video Bandwidth
CH7009A
Bit 6 of register VBW controls whether the chroma sub-carrier free-runs, or is locked to the video signal. A ‘1’
causes the sub-carrier to lock to the TV vertical rate, and should be used when the CIVEN bit (register 10h) is
set to ‘0’. A ‘0’ causes the sub-carrier to free-run, and should be used when the CIVEN bit is set to ‘1’.
Bit 7 of register VBW controls the vertical blanking interval defeat function. A ‘1’ in this register location
forces the flicker filter to minimum filtering during the vertical blanking interval. A ‘0’ in this location causes
the flicker filter to remain at the same setting inside and outside of the vertical blanking interval.
Text Enhancement Register
Symbol:
Address:
Bits:
TE
03h
6
Bits 2-0 of register TE control the text enhancement circuitry within the CH7009. A value of ‘000’ minimizes the
enhancement feature, while a value of ‘111’ maximizes the enhancement.
Bits 5-3 of register TE contain the MSB values for the start of active video, horizontal position and vertical position
controls. They are described in detail in the SAV, HP and VP register descriptions.
27
28
29
30
31
32
33
34
35
36
37
38
1.100
0.859
0.942
1.030
0.804
0.919
1.030
0.767
0.862
0.965
0.709
0.466
1.520
1.190
1.300
1.420
1.110
1.270
1.430
1.060
1.190
1.330
0.979
0.643
4.100
3.190
3.500
3.830
2.990
3.410
3.840
2.850
3.200
3.580
2.630
1.730
4.780
3.720
4.080
4.470
3.480
3.980
4.480
3.320
3.740
4.180
3.070
2.020
6.300
4.910
5.380
5.890
4.590
5.250
5.910
4.380
4.930
5.510
4.050
2.660
10.400
8.140
8.920
9.770
7.620
8.710
9.790
7.260
8.170
9.140
6.720
4.410
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
TYPE:
DEFAULT:
SAV8
R/W
HP8
R/W
VP8
R/W
TE2
R/W
TE1
R/W
TE0
R/W
0
0
0
1
0
1
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