參數(shù)資料
型號: CAT93C57WI-1.8-T3REVE
元件分類: PROM
英文描述: 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
封裝: 0.150 INCH, GREEN, MS-012, SOIC-8
文件頁數(shù): 15/18頁
文件大?。?/td> 246K
代理商: CAT93C57WI-1.8-T3REVE
CAT93C56, CAT93C57
Doc. No. MD-1088 Rev. Q
6
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
The format for all instructions sent to the device is a
logical “1” start bit, a 2-bit (or 4-bit) opcode, 7-bit
address (CAT93C57) / 8-bit address (CAT93C56) (an
additional bit when organized X8) and for write
operations a 16-bit data field (8-bit for X8 organi–
zations). The instruction format is shown in Instruction
Set table.
INSTRUCTION SET
Address
Data
Instruction
Device
Type
Start
Bit
Opcode
x8
x16
x8
x16
Comments
READ
93C56
(1)
1
10
A8-A0
A7-A0
93C57
1
10
A7-A0
A6-A0
Read Address
AN–A0
ERASE
93C56
(1)
1
11
A8-A0
A7-A0
93C57
1
11
A7-A0
A6-A0
Clear Address
AN–A0
WRITE
93C56
(1)
1
01
A8-A0
A7-A0
D7-D0
D15-D0
93C57
1
01
A7-A0
A6-A0
D7-D0
D15-D0
Write Address
AN–A0
EWEN
93C56
(1)
1
00
11XXXXXXX
11XXXXXX
93C57
1
00
11XXXXXX
11XXXXX
Write Enable
EWDS
93C56
(1)
1
00
00XXXXXXX
00XXXXXX
93C57
1
00
00XXXXXX
00XXXXX
Write Disable
ERAL
93C56
(1)
1
00
10XXXXXXX
10XXXXXX
93C57
1
00
10XXXXXX
10XXXXX
Clear All
Addresses
WRAL
93C56
(1)
1
00
01XXXXXXX
01XXXXXX
D7-D0
D15-D0
93C57
1
00
01XXXXXX
01XXXXX
D7-D0
D15-D0
Write All
Addresses
Note:
(1) Address bit A8 for 256x8 organization and A7 for 128x16 organization are "Don't Care" bits, but must be kept at either a "1" or "0" for
READ, WRITE and ERASE commands.
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