參數(shù)資料
型號(hào)： CAT28F102NA-12T
元件分類： PROM
英文描述： 64K X 16 FLASH 12V PROM, 120 ns, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 3/15頁(yè)
文件大?。?/td> 107K
代理商： CAT28F102NA-12T
CAT28F102
11
Doc. No. 1014, Rev. A
Programming Mode
The programming operation is initiated using the
programming algorithm of Figure 9. During the first write
cycle, the command XX40H is written into the command
register. During the second write cycle, the address of
the memory location to be programmed is latched on the
falling edge of
WE, while the data is latched on the rising
edge of
WE. The program operation terminates with the
next rising edge of
WE. An integrated stop timer allows
for automatic timing control over this operation,
eliminating the need for a maximum program timing
specification. Refer to AC Characteristics (Program/
Erase) for specific timing parameters.
Figure 8. A.C. Timing for Programming Operation
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
VCC
VPP
tWC
tRC
tAS
tAH
tCS
tCH
tCS
tCH
tEHQZ
tDF
tGHWL
tWPH
tWHWH1
tWHGL
tWP
tDS
HIGH-Z
DATA IN
= XX 40H
DATA IN
= XX C0H
VALID
DATA OUT
tDH
tWP
tDH
tDS
tWP
tDH
tOLZ
tOE
tOH
tLZ
tCE
tVPEL
VPPH
VPPL
0V
5.0V
VCC POWER-UP
& STANDBY
SETUP PROGRAM
COMMAND
LATCH ADDRESS
& DATA
PROGRAMMING
PROGRAM
VERIFY
COMMAND
PROGRAM
VERIFICATION
VCC POWER-DOWN/
STANDBY
Program-Verify Mode
A Program-verify cycle is performed to ensure that all
bits have been correctly programmed following each
byte programming operation. The specific address is
already latched from the write cycle just completed, and
stays latched until the verify is completed. The Program-
verify operation is initiated by writing XXC0H into the
command register. An internal reference generates the
necessary high voltages so that the user does not need
to modify VCC. Refer to AC Characteristics (Program/
Erase) for specific timing parameters.
Main Menu
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