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參數(shù)資料
| 型號(hào)： | C9853AT |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 145K |
| 代理商： | C9853AT |
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+/+
…when timing is critical
C9853
High Performance Pentium
III Clock Generator
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
1.0
4/13/2000
MILPITAS, CA TEL 408-263-6300, FAX 408-263-6571
Page 2 of 16
http://www.imicorp.com
Pin Description
PIN No.
Pin Name
I/O
Description
45
3Vmref
O
3V reference to memory clock driver. It is synchronous to the CPU clock.
44
3Vmref_b
O
3V reference to memory clock driver (180
° out of phase with 3Vmref).
42*
Spread#
I
Invokes Spread Spectrum functionality on the Differential CPU clocks, 66 MHz
clocks, 33 MHz PCI clocks, and the Mref/Mref_b clocks. Active Low.
41
CPU1
40
CPU1#
O
CPU clock pair. These two differential clocks are 180
o out of phase with each
other. See the table on page 1 of this data sheet for the frequency selections.
38
CPU2
37
CPU2#
O
CPU clock pair. These two differential clocks are 180
o out of phase with each
other. See the table on page 1 of this data sheet for the frequency selections.
35
I_Ref
This pin is the reference current input for the CPU pairs. This pin takes a fixed
precision resistor (Rr) tied to ground (see pg. 12) in order to establish the
appropriate current.
30, 29,
27
3V66 (0;2)
O
66.67 MHz 3.3 Volt outputs.
32*
PwrDwn#
I
When asserted low, this pin invokes power-down mode by shutting off all the
clocks, disabling all internal circuitry, and shutting down the crystal oscillator.
The 3Vmref, 3Vmref_B, 3V66, REF and CPU clocks are driven low during this
condition. It has a 250 K
internal pull-up.
23*
48 M0/SelA
24*
48 M1/SelB
SelA and SelB inputs are sensed on power-up and then internally latched prior to
the pin being used for output of 3V 48 MHz clocks.
21*
SEL100/133
I
CPU frequency select pin. Low = 100 MHz, High = 133 MHz.
4
XOUT
O
14.318 MHz crystal output.
3
XIN
I
14.318 MHz crystal input.
2
Ref_Out
O
14.318 MHz reference outputs.
48
Ref1/MultSel (0)
I
1
Ref2/MultSel (1)
MultSel0 and MultSel1 inputs are sensed on power-up and then internally
latched prior to the pin being used for output of 3V 14.318 MHz clocks. They sel
Iref values, see pg. 11.
19, 18,
16, 15,
13, 12,
10, 9, 7,
6
PCI (1:10)
O
3.3V 33 MHz outputs. These clocks are used for onboard and plugin slot PCI
devices.
46
VDDM
P
Power pin for 3 Vmref and 3Vmref_b dedicated use.
43
VSSM
P
Ground pin for 3Vmref and 3Vmref_b dedicated use.
39
VDDC
P
Power pin for CPU/CPU# dedicated use.
36
VSSC
P
Ground pin for CPU/CPU# dedicated use.
34
VDD
P
Power pin for dedicated core use.
33
VSS
P
Ground pin for dedicated core use.
31, 26
VDDL
P
Power pins for 3V66 dedicated use.
28
VSSL
P
Ground pin for 3V66 dedicated use.
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