參數資料
型號： C8051F005-TB
廠商： Silicon Laboratories Inc
文件頁數： 33/171頁
文件大小： 0K
描述： BOARD PROTOTYPING W/C8051F005
標準包裝： 1
類型： MCU
適用于相關產品： C8051F005
所含物品： 板
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Figure 17.6. SPI0CN: SPI Control Register
R/W
R
R/W
Reset Value
SPIF
WCOL
MODF
RXOVRN
TXBSY
SLVSEL
MSTEN
SPIEN
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
(bit addressable)
0xF8
Bit7:
SPIF: SPI Interrupt Flag.
This bit is set to logic 1 by hardware at the end of a data transfer. If interrupts are enabled,
setting this bit causes the CPU to vector to the SPI0 interrupt service routine. This bit is
not automatically cleared by hardware. It must be cleared by software.
Bit6:
WCOL: Write Collision Flag.
This bit is set to logic 1 by hardware (and generates a SPI interrupt) to indicate a write to
the SPI data register was attempted while a data transfer was in progress. It is cleared by
software.
Bit5:
MODF: Mode Fault Flag.
This bit is set to logic 1 by hardware (and generates a SPI interrupt) when a master mode
collision is detected (NSS is low and MSTEN = 1). This bit is not automatically cleared by
hardware. It must be cleared by software.
Bit4:
RXOVRN: Receive Overrun Flag.
This bit is set to logic 1 by hardware (and generates a SPI interrupt) when the receive
buffer still holds unread data from a previous transfer and the last bit of the current transfer
is shifted into the SPI shift register. This bit is not automatically cleared by hardware. It
must be cleared by software.
Bit3:
TXBSY: Transmit Busy Flag.
This bit is set to logic 1 by hardware while a master mode transfer is in progress. It is
cleared by hardware at the end of the transfer.
Bit2:
SLVSEL: Slave Selected Flag.
This bit is set to logic 1 whenever the NSS pin is low indicating it is enabled as a slave. It
is cleared to logic 0 when NSS is high (slave disabled).
Bit1:
MSTEN: Master Mode Enable.
0: Disable master mode. Operate in slave mode.
1: Enable master mode. Operate as a master.
Bit0:
SPIEN: SPI Enable.
This bit enables/disables the SPI.
0: SPI disabled.
1: SPI enabled.
Rev. 1.7
128
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相關代理商/技術參數
參數描述
C8051F005-TB-K 功能描述:BOARD PROTOTYPING W/C8051F005 制造商:silicon labs 系列:- 零件狀態(tài):在售 板類型:評估平臺 類型:MCU 8-位 核心處理器:8051 操作系統(tǒng):- 平臺:- 配套使用產品/相關產品:C8051F0xx 安裝類型:固定 內容:板 標準包裝:1
C8051F006 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F006-GQ 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F006-GQR 功能描述:8位微控制器 -MCU 32KB 12ADC 48Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F006R 功能描述:8位微控制器 -MCU C +-12Bit 48Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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