參數(shù)資料
型號: BXM80526B500256
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 500 MHz, MICROPROCESSOR, CPGA495
封裝: MICRO PGA-495
文件頁數(shù): 4/84頁
文件大小: 450K
代理商: BXM80526B500256
Mobile Pentium III Processor in BGA2 and Micro-PGA2 Packages Datasheet
Intel Corporation
4
1.1
Overview
Performance improved over existing mobile processors
— Supports the Intel Architecture with Dynamic Execution
— Supports the Intel Architecture MMX technology
— Supports Streaming SIMD Extensions for enhanced video, sound, and 3D performance
— Supports Intel SpeedStep Technology
— Integrated Intel Floating Point Unit compatible with the IEEE 754 standard
On-die primary (L1) instruction and data caches
— 4-way set associative, 32-byte line size, 1 line per sector
— 16-Kbyte instruction cache and 16-Kbyte write-back data cache
— Cacheable range controlled by processor programmable registers
On-die second level (L2) cache
— 8-way set associative, 32-byte line size, 1 line per sector
— Operates at full core speed
— 256-Kbyte, ECC protected cache data array
GTL+ system bus interface
— 64-bit data bus, 100-MHz operation
— Uniprocessor, two loads only (processor and I/O bridge/memory controller)
— Integrated termination
Pentium II processor clock control
— Quick Start for low power, low exit latency clock “throttling”
— Deep Sleep mode for lower power dissipation
Thermal diode for measuring processor temperature
1.2
Terminology
In this document a “#” symbol following a signal name indicates that the signal is active low. This
means that when the signal is asserted (based on the name of the signal) it is in an electrical low
state. Otherwise, signals are driven in an electrical high state when they are asserted. In state
machine diagrams, a signal name in a condition indicates the condition of that signal being
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