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參數(shù)資料
| 型號： | BUK106-50SP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | PowerMOS transistor Logic level TOPFET(功率MOS晶體管邏輯電平TOPFET) |
| 中文描述： | 160 A BUF OR INV BASED PRPHL DRVR, PZFM5 |
| 封裝： | PLASTIC, SOT-263-01, 5 PIN |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 142K |
| 代理商： | BUK106-50SP |
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK106-50L/S
BUK106-50LP/SP
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
PARAMETER
CONDITIONS
I
DRRM
Repetitive peak clamping drain current R
IS
≥
100
1
E
DSM
Non-repetitive inductive turn-off
I
DM
= 27 A; R
IS
≥
100
energy
2
E
DRM
Repetitive inductive turn-off energy
R
IS
≥
100
; T
mb
≤
85 C;
I
= 16 A; V
DD
≤
20 V;
f = 250 Hz
I
DIRM
Repetitive peak drain to input current
3
R
IS
= 0
; t
p
≤
1 ms
MIN.
-
-
MAX.
50
1
UNIT
A
J
-
80
mJ
-
50
mA
REVERSE DIODE LIMITING VALUE
SYMBOL
I
S
PARAMETER
Continuous forward current
CONDITIONS
T
mb
= 25 C;
V
IS
= V
PS
= V
FS
= 0 V
MIN.
-
MAX.
50
UNIT
A
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Thermal resistance
Junction to mounting base
Junction to ambient
CONDITIONS
MIN.
TYP.
MAX.
UNIT
R
th j-mb
R
th j-a
-
-
-
0.8
60
1.0
-
K/W
K/W
in free air
STATIC CHARACTERISTICS
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
V
(CL)DSR
Drain-source clamping voltage
V
(CL)DSR
Drain-source clamping voltage
CONDITIONS
R
IS
= 100
; I
D
= 10 mA
R
IS
= 100
; I
DM
= 1 A; t
p
≤
300
μ
s;
δ
≤
0.01
MIN.
50
50
TYP.
-
-
MAX.
65
70
UNIT
V
V
I
DSS
I
DSR
I
DSR
Zero input voltage drain current V
DS
= 12 V; V
IS
= 0 V
Drain source leakage current
Drain source leakage current
-
-
0.5
1
10
20
μ
A
μ
A
V
DS
= 50 V; R
IS
= 100
;
V
DS
= 40 V; R
IS
= 100
;
T
j
= 125 C
V
IS
= 8 V
V
IS
= 5 V
-
-
-
10
22
28
100
28
35
μ
A
m
m
R
DS(ON)
Drain-source on-state
resistance
I
DM
= 25 A;
t
p
≤
300
μ
s;
δ
≤
0.01
1
The input pin must be connected to the source pin by a specified external resistance to allow the power MOSFET gate source voltage to
become sufficiently positive for active clamping. Refer to INPUT CHARACTERISTICS.
2
While the protection supply voltage is connected, during overvoltage clamping it is possible that the overload protection may operate at
energies close to the limiting value. Refer to OVERLOAD PROTECTION CHARACTERISTICS.
3
Shorting the input to source with low resistance inhibits the internal overvoltage protection by preventing the power MOSFET gate source
voltage becoming positive.
February 1993
3
Rev 1.200
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