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參數(shù)資料
| 型號： | BTS555P |
| 元件分類： | TVS-瞬態(tài)抑制二極管 |
| 英文描述： | Transient Voltage Suppressor Diodes |
| 中文描述： | 單外設驅(qū)動 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 200K |
| 代理商： | BTS555P |
Data Sheet BTS550P
Infineon Technologies AG
Page 2
2000-Mar-24
Pin
Symbol
Function
Output to the load. The pins
1 and 5 must be shorted with each other
especially in high current applications!
3
)
1
OUT
O
2
IN
I
Input, activates the power switch in case of short to ground
3
Vbb
+
Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the V
bb
connection
instead of this pin
4
)
.
4
IS
S
Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 7)
5
OUT
O
Output to the load. The pins
1 and 5 must be shorted with each other
especially in high current applications!
3)
Maximum Ratings
at
T
j
= 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for short circuit protection,
T
j,start
=-40 ...+150°C:
(E
AS
limitation see diagram on page 9)
Load current (short circuit current, see page 5)
Load dump protection
V
LoadDump
=
U
A
+
V
s
,
U
A
=
13.5
V
R
I
5
)
=
2
,
R
L
=
0.54
,
t
d
=
200
ms,
IN,
IS
= open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), T
C
≤
25 °C
Inductive load switch-off energy dissipation, single pulse
V
bb
=
12V,
T
j,start
=
150°C,
T
C
=
150°C const.,
I
L
=
20
A, Z
L
=
15
mH, 0
,
see diagrams on page 10
Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 k
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagrams on page 8
Symbol
V
bb
V
bb
Values
Unit
40
34
V
V
I
L
self-limited
A
V
Load dump6
)
80
V
T
j
T
stg
P
tot
-40 ...+150
-55 ...+150
°C
360
W
E
AS
3
J
V
ESD
4
kV
I
IN
I
IS
+15
, -250
+15
, -250
mA
3)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability
and decrease the current sense accuracy
4)
Otherwise add up to 0.5 m
(depending on used length of the pin) to the R
ON
if the pin is used instead of the
tab.
5)
R
I
= internal resistance of the load dump test pulse generator.
6)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
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