參數(shù)資料
型號(hào): BS62LV2007
廠商: BRILLIANCE SEMICONDUCTOR, INC.
英文描述: Very Low Power/Voltage CMOS SRAM 256K X 8 bit
中文描述: 非常低功率/電壓CMOS SRAM的256K × 8位
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 195K
代理商: BS62LV2007
R0201-BS62LV2007
Revision 2.0
April 2002
6
BS62LV2007
R0201-BS62LV2007
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS62LV2007-70
MIN. TYP. MAX.
BS62LV2007-10
MIN. TYP. MAX.
UNIT
t
AVAX
t
WC
Write Cycle Time
70
--
100
--
ns
t
E1LWH
t
CW
Chip Select to End of Write
70
--
100
--
ns
t
AVWL
t
AS
Address Set up Time
0
--
0
--
ns
t
AVWH
t
AW
Address Valid to End of Write
70
--
100
--
ns
t
WLWH
t
WP
Write Pulse Width
35
--
50
--
ns
t
WHAX
t
WR1
Write Recovery Time
(CE1 , WE)
0
--
0
--
ns
t
E2LAX
t
WR2
Write Recovery Time
(CE2)
0
--
0
--
ns
t
WLOZ
t
WHZ
Write to Output in High Z
0--
30
0
--
40
ns
t
DVWH
t
DW
Data to Write Time Overlap
30
--
40
--
ns
t
WHDX
t
DH
Data Hold from Write Time
0
--
0
--
ns
t
GHOZ
t
OHZ
Output Disable to Output in High Z
0--
30
0
--
40
ns
t
WHQX
t
OW
End of Write to Output Active
5
----
10
----
ns
AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 3.0V )
WRITE CYCLE
SWITCHING WAVEFORMS (WRITE CYCLE)
BSI
WRITE CYCLE1 (1)
t WR1
t WC
(3)
t CW
(11)
t CW
(2)
t WP
t AW
t OHZ
(4,10)
t AS
t WR2
(3)
t DH
t DW
D
IN
D
OUT
WE
CE2
CE1
OE
ADDRESS
(5)
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