參數(shù)資料
型號(hào): B900J24FXX16IT
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: 0-BIT, 59.88 MHz, OTHER DSP, PQFP44
文件頁(yè)數(shù): 53/100頁(yè)
文件大?。?/td> 1547K
代理商: B900J24FXX16IT
56
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
5 Software Architecture (continued)
5.2
Register Settings (continued)
Table 45. JTAG ID Register (32-bit)
Bit
31
30
29—28
27—19
18—12
11—0
Field
SLEWR
SECURE
BOPT
ROMCODE
0x09
0x03B
Bit
Field
Mask-Programmable Features
31
SLEWR
Slew rate control:
Specifies the slew rate for the output buffers for all IOP pins.
0 = standard buffers.
1 = slow buffers.
30
SECURE
Security:
0 = unsecured.
1 = secured.
29—28
BOPT
Buffer options:
Specifies what value of series resistance is placed in all IOP pins.
00 = no resistance with output buffers.
01 = 100
of resistance in output buffers.
10 = 300
of resistance in output buffers.
11 = 500
of resistance in output buffers.
27—19
ROMCODE
The user’s ROMCODE ID (in hexadecimal), as calculated by the following formula
using the letter codes from Table 46:
ROMCODE ID = 0x[(20 x first letter) + second letter]
18—12
0x09
Device ID.
11—0
0x03B
Manufacturer’s ID (Lucent Technologies).
Table 46. JTAG ROMCODE Letter Values
ROMCODE Letter
A
B
C
D
E
F
G
H
J
K
LM
NP
RS
T
U
W
Y
Value
01234
56789
10 11 12
13
14
15
16
17
18
19
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