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32133D–11/2011
UC3D
17.6.7
Interrupt Mask Register
Name:
IMR
Access Type:
Read-only
Offset:
0x018
Reset Value:
0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
31
30
29
28
27
26
25
24
-
---
--
23
22
21
20
19
18
17
16
-
---
--
15
14
13
12
11
10
9
8
-
---
--
76
543
21
0
-
RCLKRDY
DONE