
203
32133D鈥�11/2011
UC3D
15. Watchdog Timer (WDT)
Rev: 4.1.0.0
15.1 Features
Watchdog Timer counter with 32-bit counter
Timing window watchdog
Clocked from system RC oscillator or the 32 KHz crystal oscillator
Configuration lock
WDT may be enabled at reset by a fuse
15.2 Overview
The Watchdog Timer (WDT) will reset the device unless it is periodically serviced by the soft-
ware. This allows the device to recover from a condition that has caused the system to be
unstable.
The WDT has an internal counter clocked from the system RC oscillator or the 32 KHz crystal
oscillator.
The WDT counter must be periodically cleared by software to avoid a watchdog reset. If the
WDT timer is not cleared correctly, the device will reset and start executing from the boot vector.
15.3 Block Diagram
Figure 15-1. WDT Block Diagram
15.4 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
CLK_CNT
Watchdog
Detector
32-bit Counter
Watchdog
Reset
0
1
RCSYS
OSC32K
CSSEL
CEN
SYNC
CLK_CNT Domain
PB Clock Domain
PB
WDTCLR
WINDOW,
CLEARED
EN, MODE,
PSEL, TBAN
CTRL
CLR
SR