參數(shù)資料
型號： ATTINY26L-8PU
廠商： Atmel
文件頁數(shù)： 157/169頁
文件大小： 0K
描述： IC MCU AVR 2K 5V 8MHZ 20-DIP
產(chǎn)品培訓(xùn)模塊： MCU Product Line Introduction
tinyAVR Introduction
標(biāo)準包裝： 18
系列： AVR® ATtiny
核心處理器： AVR
芯體尺寸： 8-位
速度： 8MHz
連通性： USI
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 16
程序存儲器容量： 2KB（1K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 11x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-DIP（0.300"，7.62mm）
包裝： 管件
產(chǎn)品目錄頁面： 612 (CN2011-ZH PDF)
配用： ATSTK600-RC08-ND - STK600 ROUTING CARD AVR
ATSTK600-ND - DEV KIT FOR AVR/AVR32
ATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM
ATSTK505-ND - ADAPTER KIT FOR 14PIN AVR MCU
其它名稱： ATTINY26L-8PJ
ATTINY26L-8PJ-ND
88
1477K–AVR–08/10
ATtiny26(L)
Note that the first two instructions is for initialization only and needs only to be executed
once.These instructions sets Three-wire mode and positive edge Shift Register clock. The loop
is repeated until the USI Counter Overflow Flag is set.
Two-wire Mode
The USI Two-wire mode is compliant to the Inter IC (TWI) bus protocol, but without slew rate lim-
iting on outputs and input noise filtering. Pin names used by this mode are SCL and SDA.
Figure 47. Two-wire Mode Operation, Simplified Diagram
Figure 47 shows two USI units operating in Two-wire mode, one as master and one as slave. It
is only the physical layer that is shown since the system operation is highly dependent of the
communication scheme used. The main differences between the master and slave operation at
this level, is the serial clock generation which is always done by the master, and only the slave
uses the clock control unit. Clock generation must be implemented in software, but the shift
operation is done automatically by both devices. Note that only clocking on negative edge for
shifting data is of practical use in this mode. The slave can insert wait states at start or end of
transfer by forcing the SCL clock low. This means that the master must always check if the SCL
line was actually released after it has generated a positive edge.
Since the clock also increments the counter, a counter overflow can be used to indicate that the
transfer is completed. The clock is generated by the master by toggling the PB2 pin via the
PORTB Register.
The data direction is not given by the physical layer. A protocol, like the one used by the TWI-
bus, must be implemented to control the data flow.
MASTER
SLAVE
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
PBy
PBz
SDA
SCL
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Two-wire Clock
Control Unit
PBy
PBz
HOLD
SCL
PORTBz
SDA
SCL
VCC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATTINY26L-8SC 功能描述:8位微控制器 -MCU AVR 2K FLSH 128B EE 128B SRAM ADC 3V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATTINY26L-8SI 功能描述:8位微控制器 -MCU AVR 2K FLSH 128B EE 128B SRAM ADC 3V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATTINY26L-8SI SL383 制造商:Atmel Corporation 功能描述:MCU 8-bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC W T/R
ATtiny26L-8SU 功能描述:8位微控制器 -MCU 2kB Flash 128B EE 128B SRAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATTINY26L-8SUR 功能描述:8位微控制器 -MCU 2K FL 128B EE 128B SRAM ADC 8MHZ IND 3V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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