參數(shù)資料
型號(hào)： ATTINY13V-10SSUR
廠商： Atmel
文件頁數(shù)： 62/176頁
文件大?。?/td> 0K
描述： MCU AVR 1KB FLASH 10MHZ 8SOIC
產(chǎn)品培訓(xùn)模塊： tinyAVR Introduction
標(biāo)準(zhǔn)包裝： 4,000
系列： AVR® ATtiny
核心處理器： AVR
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 6
程序存儲(chǔ)器容量： 1KB（512 x 16）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量： 64 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
包裝： 帶卷 (TR)
其它名稱： ATTINY13V-10SSUR-ND
ATTINY13V-10SSURTR
PIC16(L)F720/721
DS41430C-page 154
Preliminary
2010-2011 Microchip Technology Inc.
17.2.6
TRANSMISSION
When the R/W bit of the received address byte is set
and an address match occurs, the R/W bit of the
SSPSTAT register is set and the slave will respond to
the master by reading out data. After the address match,
an ACK pulse is generated by the slave hardware and
the SCL pin is held low (clock is automatically stretched)
until the slave is ready to respond. See Section 17.2.7
“Clock Stretching”. The data the slave will transmit
must be loaded into the SSPBUF register, which sets
the BF bit. The SCL line is released by setting the CKP
bit of the SSPCON register.
An SSP interrupt is generated for each transferred data
byte. The SSPIF flag bit of the PIR1 register initiates an
SSP interrupt, and must be cleared by software before
the next byte is transmitted. The BF bit of the SSPSTAT
register is cleared on the falling edge of the 8th
received clock pulse. The SSPIF flag bit is set on the
falling edge of the ninth clock pulse.
Following the 8th falling clock edge, control of the SDA
line is released back to the master so that the master
can acknowledge or not acknowledge the response. If
the master sends a not acknowledge, the slave’s
transmission is complete and the slave must monitor for
the next Start condition. If the master acknowledges,
control of the bus is returned to the slave to transmit
another byte of data. Just as with the previous byte, the
clock is stretched by the slave, data must be loaded into
the SSPBUF and CKP must be set to release the clock
line (SCL).
FIGURE 17-12:
I2C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
SDA
SCL
SSPIF
BF
CKP
A7
A6
A5
A4
A3
A2
A1
ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Transmitting Data
R/W
Receiving Address
1
2
3
4
567
89
1
2
3
4
5
6
7
8
9
P
Cleared in software
Set bit after writing to SSPBUF
S
Data in
sampled
SCL held low
while CPU
responds to SSPIF
(the SSPBUF must be written to
before the CKP bit can be set)
Dummy read of SSPBUF
to clear BF flag
SSPBUF is written in software From SSP Interrupt
Service Routine
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATTINY13V-10SSU-SL383-EW 制造商:Atmel Corporation 功能描述:
ATtiny13V-10SU 功能描述:8位微控制器 -MCU 1kB Flash 0.064kB EEPROM 6 I/O Pins RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATTINY13V-10SU SL383 制造商:Atmel Corporation 功能描述:MCU 8-bit ATtiny AVR RISC 1KB Flash 2.5V/3.3V/5V 8-Pin SOIC EIAJ T/R
ATTINY13V-10SUR 功能描述:8位微控制器 -MCU AVR 1KB FLSH 64B EE 64B SRAM-10MHz 1.8V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATTINY13V-W-11 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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