參數(shù)資料
型號: ATTINY13V-10SSUR
廠商: Atmel
文件頁數(shù): 33/176頁
文件大?。?/td> 0K
描述: MCU AVR 1KB FLASH 10MHZ 8SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 4,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 1KB(512 x 16)
程序存儲器類型: 閃存
EEPROM 大小: 64 x 8
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY13V-10SSUR-ND
ATTINY13V-10SSURTR
PIC16(L)F720/721
DS41430C-page 128
Preliminary
2010-2011 Microchip Technology Inc.
REGISTER 16-2:
RCSTA: RECEIVE STATUS AND CONTROL REGISTER
R/W-0
R-0
R-x
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
SPEN: Serial Port Enable bit(1)
1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
0 = Serial port disabled (held in Reset)
bit 6
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
bit 5
SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care
Synchronous mode – Master:
1 = Enables single receive
0 = Disables single receive
This bit is cleared after reception is complete.
Synchronous mode – Slave:
Don’t care
bit 4
CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables receiver
0 = Disables receiver
Synchronous mode:
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
bit 3
ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enable interrupt and load the receive buffer when RSR<8> is set
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
Asynchronous mode 8-bit (RX9 = 0):
Don’t care
Synchronous mode:
Must be set to ‘0’
bit 2
FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
bit 1
OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
bit 0
RX9D: Ninth bit of Received Data
This can be address/data bit or a parity bit and must be calculated by user firmware.
Note 1: The AUSART module automatically changes the pin from tri-state to drive as needed. Configure
TRISx = 1.
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