參數(shù)資料
型號: AT90LS8535-4AI
廠商: Atmel
文件頁數(shù): 76/127頁
文件大?。?/td> 0K
描述: IC MCU 8K 4MHZ A/D LV IT 44TQFP
標準包裝: 160
系列: AVR® 90LS
核心處理器: AVR
芯體尺寸: 8-位
速度: 4MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(4K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
PIC16C71X
DS30272A-page 52
1997 Microchip Technology Inc.
8.3
Reset
The PIC16CXX differentiates between various kinds of
reset:
Power-on Reset (POR)
MCLR reset during normal operation
MCLR reset during SLEEP
WDT Reset (normal operation)
Brown-out Reset (BOR) (PIC16C710/711/715)
Parity Error Reset (PIC16C715)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR and
Applicable Devices
710 71 711 715
WDT Reset, on MCLR reset during SLEEP, and Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation. The TO and PD bits are set or cleared differ-
ently in different reset situations as indicated in Table 8-
7, Table 8-8 and Table 8-9. These bits are used in soft-
ware to determine the nature of the reset. See Table 8-
10 and Table 8-11 for a full description of reset states
of all registers.
A simplied block diagram of the on-chip reset circuit is
shown in Figure 8-9.
The PIC16C710/711/715 have a MCLR noise lter in
the MCLR reset path. The lter will detect and ignore
small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
FIGURE 8-9:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR/VPP Pin
VDD
OSC1/
WDT
Module
VDD rise
detect
OST/PWRT
On-chip(1)
RC OSC
WDT Time-out
Power-on Reset
OST
PWRT
Chip_Reset
10-bit Ripple-counter
Enable OST
Enable PWRT
SLEEP
See Table 8-6 for time-out situations.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
2: Brown-out Reset is implemented on the PIC16C710/711/715.
3: Parity Error Reset is implemented on the PIC16C715.
Brown-out
Reset(2)
BODEN
CLKIN
Pin
10-bit Ripple-counter
Program
Memory
Parity(3)
MPEEN
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