參數(shù)資料
型號: AT90LS8535-4AI
廠商: Atmel
文件頁數(shù): 41/127頁
文件大?。?/td> 0K
描述: IC MCU 8K 4MHZ A/D LV IT 44TQFP
標準包裝: 160
系列: AVR® 90LS
核心處理器: AVR
芯體尺寸: 8-位
速度: 4MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(4K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
20
AT90S/LS8535
1041H–11/01
Stack Pointer – SP
The AT90S8535 Stack Pointer is implemented as two 8-bit registers in the I/O space
locations $3E ($5E) and $3D ($5D). As the AT90S8535 data memory has $25F loca-
tions, 10 bits are used.
The Stack Pointer points to the data SRAM stack area where the Subroutine and Inter-
rupt stacks are located. This stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by 1 when
data is pushed onto the stack with the PUSH instruction and it is decremented by 2
when an address is pushed onto the stack with subroutine calls and interrupts. The
Stack Pointer is incremented by 1 when data is popped from the stack with the POP
instruction and it is incremented by 2 when an address is popped from the stack with
return from subroutine RET or return from interrupt RETI.
Reset and Interrupt
Handling
The AT90S8535 provides 16 different interrupt sources. These interrupts and the sepa-
rate reset vector each have a separate program vector in the program memory space.
All interrupts are assigned individual enable bits that must be set (one) together with the
I-bit in the Status Register in order to enable the interrupt.
The lowest addresses in the program memory space are automatically defined as the
Reset and Interrupt vectors. The complete list of vectors is shown in Table 2. The list
also determines the priority levels of the different interrupts. The lower the address, the
higher the priority level. RESET has the highest priority, and next is INT0 (the External
Interrupt Request 0), etc.
Bit
1514
1312
1110
9
8
$3E ($5E)
––
––––
SP9
SP8
SPH
$3D ($5D)
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
SPL
76
543210
Read/Write
R
RRRRR
R/W
Initial Value
0
000000
00
000000
Table 2. Reset and Interrupt Vectors
Vector No.
Program Address
Source
Interrupt Definition
1
$000
RESET
Hardware Pin, Power-on Reset and
Watchdog Reset
2
$001
INT0
External Interrupt Request 0
3
$002
INT1
External Interrupt Request 1
4
$003
TIMER2 COMP
Timer/Counter2 Compare Match
5
$004
TIMER2 OVF
Timer/Counter2 Overflow
6
$005
TIMER1 CAPT
Timer/Counter1 Capture Event
7
$006
TIMER1 COMPA
Timer/Counter1 Compare Match A
8
$007
TIMER1 COMPB
Timer/Counter1 Compare Match B
9
$008
TIMER1 OVF
Timer/Counter1 Overflow
10
$009
TIMER0 OVF
Timer/Counter0 Overflow
11
$00A
SPI, STC
SPI Serial Transfer Complete
12
$00B
UART, RX
UART, Rx Complete
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