參數(shù)資料
型號: AT45DB011D-MU
廠商: ATMEL CORP
元件分類: DRAM
英文描述: 1-megabit 2.7-volt DataFlash
中文描述: 1M X 1 FLASH 2.7V PROM, DSO8
封裝: 6 X 5 MM, 1 MM HEIGHT, GREEN, MLF-8
文件頁數(shù): 10/52頁
文件大小: 1107K
代理商: AT45DB011D-MU
10
3639B–DFLASH–02/07
AT45DB011D [Preliminary]
7.7
Chip Erase
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH
must be clocked into the device. Since the entire memory array is to be erased, no address
bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. After the last bit of the opcode sequence has been clocked in, the CS pin can be deas-
serted to start the erase process. The erase operation is internally self-timed and should take
place in a time of t
CE
. During this time, the Status Register will indicate that the device is busy.
The Chip Erase command will not affect sectors that are protected or locked down; the contents
of those sectors will remain unchanged. Only those sectors that are not protected or locked
down will be erased.
The WP pin can be asserted while the device is erasing, but protection will not be activated until
the internal erase cycle completes.
Figure 7-1.
Chip Erase
Table 7-2.
Sector Erase Addressing
PA8/
A16
PA7/
A15
PA6/
A14
PA5/
A13
PA4/
A12
PA3/
A11
PA2/
A10
PA1/
A9
PA0/
A8
Sector
0
0
0
0
0
0
X
X
X
0a
0
0
0
0
0
1
X
X
X
0b
0
1
0
0
0
0
0
0
0
1
1
0
X
X
X
X
X
X
X
2
1
1
X
X
X
X
X
X
X
3
Command
Byte 1
Byte 2
Byte 3
Byte 4
Chip Erase
C7H
94H
80H
9AH
Opcode
Byte 1
Opcode
Byte 2
Opcode
Byte 3
Opcode
Byte 4
CS
Each transition
represents 8 bits
SI
相關(guān)PDF資料
PDF描述
AT45DB011D-SSU 1-megabit 2.7-volt DataFlash
AT45DB011D-SU 1-megabit 2.7-volt DataFlash
AT45DB011 1-megabit 2.7-volt Only Serial DataFlash(1M位 2.7V串行數(shù)據(jù)閃速存儲器)
AT45DB021B-CU 2-megabit 2.7-volt Only DataFlash
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