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參數(shù)資料
| 型號： | AT45BR3214B |
| 廠商： | Atmel Corp. |
| 英文描述： | 32-MEGABIT DATAFLASH + 4-MEGABIT SRAM STACK MEMORY |
| 中文描述： | 32-MEGABIT的DataFlash 4兆位的SRAM堆棧內(nèi)存 |
| 文件頁數(shù)： | 9/40頁 |
| 文件大?。?/td> | 488K |
| 代理商： | AT45BR3214B |
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9
AT45BR3214B
3356B–DFLASH–10/04
MAIN MEMORY PAGE PROGRAM THROUGH BUFFER:
This operation is a combina-
tion of the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase
operations. Data is first shifted into buffer 1 or buffer 2 from the SI pin and then pro-
grammed into a specified page in the main memory. To initiate the operation, an 8-bit
opcode, 82H for buffer 1 or 85H for buffer 2, must be followed by one reserved bit and
23 address bits. The 13 most significant address bits (PA12 - PA0) select the page in
the main memory where data is to be written, and the next ten address bits
(BFA9 - BFA0) select the first byte in the buffer to be written. After all address bits are
shifted in, the part will take data from the SI pin and store it in one of the data buffers. If
the end of the buffer is reached, the device will wrap around back to the beginning of the
buffer. When there is a low-to-high transition on the CS pin, the part will first erase the
selected page in main memory to all 1s and then program the data stored in the buffer
into the specified page in the main memory. Both the erase and the programming of the
page are internally self-timed and should take place in a maximum of time t
EP
. During
this time, the status register will indicate that the part is busy.
Additional Commands
MAIN MEMORY PAGE TO BUFFER TRANSFER:
A page of data can be transferred
from the main memory to either buffer 1 or buffer 2. To start the operation, an 8-bit
opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by one reserved bit, 13
address bits (PA12 - PA0) which specify the page in main memory that is to be trans-
ferred, and ten don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of
the page of data from the main memory to the buffer will begin when the CS pin transi-
tions from a low to a high state. During the transfer of a page of data (t
XFR
), the status
register can be read to determine whether the transfer has been completed or not.
MAIN MEMORY PAGE TO BUFFER COMPARE:
A page of data in main memory can
be compared to the data in buffer 1 or buffer 2. To initiate the operation, an 8-bit opcode,
60H for buffer 1 and 61H for buffer 2, must be followed by 24 address bits consisting of
one reserved bit, 13 address bits (PA12 - PA0) which specify the page in the main mem-
ory that is to be compared to the buffer, and ten don’t care bits. The CS pin must be low
while toggling the SCK pin to load the opcode, the address bits, and the don’t care bits
from the SI pin. On the low-to-high transition of the CS pin, the 528 bytes in the selected
main memory page will be compared with the 528 bytes in buffer 1 or buffer 2. During
this time (t
XFR
), the status register will indicate that the part is busy. On completion of the
compare operation, bit 6 of the status register is updated with the result of the compare.
AUTO PAGE REWRITE:
This mode is only needed if multiple bytes within a page or
multiple pages of data are modified in a random fashion. This mode is a combination of
two operations: Main Memory Page to Buffer Transfer and Buffer to Main Memory Page
Program with Built-in Erase. A page of data is first transferred from the main memory to
buffer 1 or buffer 2, and then the same data (from buffer 1 or buffer 2) is programmed
back into its original page of main memory. To start the rewrite operation, an 8-bit
opcode, 58H for buffer 1 or 59H for buffer 2, must be followed by one reserved bit, 13
address bits (PA12 - PA0) that specify the page in main memory to be rewritten, and ten
additional don’t care bits. When a low-to-high transition occurs on the CS pin, the part
will first transfer data from the page in main memory to a buffer and then program the
data from the buffer back into same page of main memory. The operation is internally
self-timed and should take place in a maximum time of t
EP
. During this time, the status
register will indicate that the part is busy.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT45BR3214B-C1 | 32-MEGABIT DATAFLASH + 4-MEGABIT SRAM STACK MEMORY |
| AT45CS1282 | 128-megabit 2.7-volt Dual-interface Code Shadow DataFlash |
| AT45D011 | 1-Megabit 5.0-volt Only Serial DataFlash |
| AT45D011-JC | 1-Megabit 5.0-volt Only Serial DataFlash |
| AT45D011-JI | 1-Megabit 5.0-volt Only Serial DataFlash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT45BR3214B-C1 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:32-MEGABIT DATAFLASH + 4-MEGABIT SRAM STACK MEMORY |
| AT45CS1282 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:128-megabit 2.7-volt Dual-interface Code Shadow DataFlash |
| AT45CS1282-TC | 功能描述:閃存 128M bit RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| AT45CS1282-TI | 功能描述:IC FLASH 128MBIT 50MHZ 40TSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| AT45D011 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1-Megabit 5.0-volt Only Serial DataFlash |
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