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參數(shù)資料
| 型號： | ASM5I9774A-52-ER |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
| 中文描述： | 9774 SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封裝： | 1 MM HEIGHT, TQFP-52 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 477K |
| 代理商： | ASM5I9774A-52-ER |
June 2005
rev 0.3
ASM5I9774A
2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
6 of 12
Notice: The information in this document is subject to change without notice.
DC Electrical Specifications
(VDD = 2.5V ± 5%, T
A
= –40°C to +85°C)
Parameter
V
IL
V
IH
V
OL
V
OH
I
IL
I
IH
Description
Condition
Min
-
1.7
-
1.8
-
-
Typ
-
-
-
-
-
-
Max
0.7
VDD+0.3
0.6
-
–100
100
Unit
V
V
V
V
μA
μA
Input Voltage, Low
Input Voltage, High
Output Voltage, Low
1
Output Voltage, High
1
Input Current, Low
2
Input Current, High
2
LVCMOS
LVCMOS
I
OL
= 15mA
I
OH
= –15mA
V
IL
= VSS
V
IL
= VDD
I
DDA
PLL Supply Current
AVDD only
-
5
10
mA
I
DDQ
Quiescent Supply Current
All VDD
pins except AVDD
Outputs loaded @ 100 MHz
-
-
8
mA
I
DD
Dynamic Supply Current
-
135
-
mA
C
IN
Input Pin Capacitance
-
4
-
pF
Z
OUT
Note: 1. Driving one 50
parallel-terminated transmission line to a termination voltage of VTT. Alternatively, each output drives up to two 50
series-
terminated transmission lines
2. Inputs have pull-up or pull-down resistors that affect the input current.
Output Impedance
14
18
22
DC Electrical Specifications
(V
DD
= 3.3V ± 5%, T
A
= –40°C to +85°C)
Parameter
V
IL
V
IH
Description
Condition
Min
-
2.0
-
-
2.4
-
-
Typ
-
-
-
-
-
-
-
Max
0.8
VDD
+ 0.3
0.55
0.30
-
–100
100
Unit
V
V
Input Voltage, Low
Input Voltage, High
LVCMOS
LVCMOS
I
OL
= 24 mA
I
OL
= 12 mA
I
OH
= –24 mA
V
IL
= VSS
V
IL
= VDD
V
OL
Output Voltage, Low
1
V
V
OH
I
IL
I
IH
Output Voltage, High
1
Input Current, Low
2
Input Current, High
2
V
μA
μA
I
DDA
I
DDQ
PLL Supply Current
AVDD
only
All VDD pins except AVDD
-
5
10
mA
Quiescent Supply Current
-
-
8
mA
I
DD
Dynamic Supply Current
Outputs loaded @ 100 MHz
-
225
-
mA
C
IN
Z
OUT
Note: 1. Driving one 50
parallel-terminated transmission line to a termination voltage of VTT. Alternatively, each output drives up to two 50
series-
terminated transmission lines
2. Inputs have pull-up or pull-down resistors that affect the input current.
Input Pin Capacitance
-
4
-
pF
Output Impedance
12
15
18
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM5I9774A-52-ET | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
| ASM5I9775A | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
| ASM5I9775A-52-ER | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
| ASM5I9775A-52-ET | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
| ASM5I9775AG-52-ER | Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM5I9774A-52-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer |
| ASM5I9774AG-52-ER | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer |
| ASM5I9774AG-52-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer |
| ASM5I9775A | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200-MHz, 14 Output Zero Delay Buffer |
| ASM5I9775A-52-ER | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200-MHz, 14 Output Zero Delay Buffer |
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