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參數(shù)資料
| 型號(hào)： | ASM2I99448G-32-ET |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| 中文描述： | 99448 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | GREEN, TQFP-32 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大小： | 594K |
| 代理商： | ASM2I99448G-32-ET |
May 2005
rev 0.3
Figure 17. Cycle–to–Cycle Jitter Reference
ASM2I99448
3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
Notice: The information in this document is subject to change without notice.
11 of
15
PCLK
PCLK
Q
X
V
PP
V
CMR
V
CC
V
CC
÷2
GND
t
P(LH)
t
P(HL)
CCLK
Q
X
V
CC
V
CC
÷2
GND
t
P(LH)
t
P(HL)
V
CC
V
CC
÷2
GND
t
SK(LH)
t
SK(HL)
V
CC
V
CC
÷2
GND
V
CC
V
CC
÷2
GND
The pin-to-pin skew is defined as the worst case
difference in propagation between any similar delay path
within a single device
CCLK
Q
X
V
CC
V
CC
÷2
GND
t
P(LH)
t
P(HL)
V
CC
V
CC
÷2
GND
t
SK(P)
=| t
PHL
- t
PHL
|
V
CC
V
CC
÷2
GND
DC (t
P
÷T
0
Χ
100%)
t
P
T
0
The time from the output controlled edge to the
non-controlled edge, divided by the time output
controlled edge, expressed as a percentage.
t
R
V
CC
= 3.3V V
CC
= 2.5V
2.4
0.5 0.6V
1.8V
t
F
T
N
T
N
+ 1
T
JIT(CC)
= |T
N
-T
N
+ 1|
The variation in cycle time of a single between adjacent
cycles, over a random sample of adjacent cycle pairs
CCLK
PCLK
V
CC
V
CC
÷2
GND
t
S
V
CC
V
CC
÷2
GND
t
H
CLK_STOP
Figure 11. Propagation Delay (t
PD
) Test Reference
Figure 12. Propagation Delay (t
PD
) Test Reference
Figure 13. Output–to–Output Skew t
SK(LH, HL)
Figure 14. Output Pulse Skew (t
SK(P)
Test Reference
Figure 16. Output Transition Time Test Reference
Figure 15. Output Duty Cycle (DC)
Figure 18. Setup and Hold Time (t
S
, t
H
) Test
相關(guān)PDF資料 |
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| ASM2I99448G-32-LR | CAP CERM 470PF 500V X7R 10% 1206 |
| ASM2I99448G-32-LT | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448 | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448-32-ER | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448-32-ET | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM2I99448G-32-LR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448G-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99456 | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:3.3V/2.5V LVCMOS Clock Fanout Buffer |
| ASM2I99456-32-ER | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS Clock Fanout Buffer |
| ASM2I99456-32-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS Clock Fanout Buffer |
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