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參數(shù)資料
| 型號(hào)： | AS8F128K32 |
| 廠商： | Austin Semiconductor, Inc |
| 英文描述： | 128K x 32 FLASH FLASH MEMORY ARRAY |
| 中文描述： | 128K的× 32閃光的閃存陣列 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 394K |
| 代理商： | AS8F128K32 |
FLASH
AS8F128K32
Austin Semiconductor, Inc.
AS8F128K32
Rev. 2.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and erase
operations in previously protected sectors.
Sector protection/unprotection must be implemented
using programming equipment. The procedure requires a high
voltage (V
ID
) on address pin A9 and the control pins.
The device is shipped with all sectors unprotected. It is
possible to determine whether a sector is protected or
unprotected. See “Autoselect Mode” for details.
Hardware Data Protection
The command sequence requirement of unlock cycles for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table). In
addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
V
CC
power-up and power-down transitions, or from system
noise.
Low VCC Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept
any write cycles. This protects data during V
CC
power-up and
power-down. The command register and all internal program/
erase circuits are disabled, and the device resets. Subsequent
writes are ignored until V
CC
is greater than V
LKO
. The system
must provide the proper signals to the control pins to prevent
unintentional writes when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE\, CEx\ or
WEx\ do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE\ = V
IL
,
CEx\ = V
IH
or WEx\ = V
IH
. To initiate a write cycle, CEx\ and
WEx\ must be a logical zero while OE\ is a logical one.
Power-Up Write Inhibit
If WEx\ = CEx\ = V
IL
and OE\ = V
IH
during power up, the device
does not accept commands on the rising edge of WEx\. The
internal state machine is automatical ly reset to reading array
data on power-up.
TABLE 3: Autoselect Codes (High Voltage Method)
DESCRIPTION
CEx\
OE\
WEx\
A16
to
A14
A13
to
A10
A9
A8 to
A7
A6
A5
to
A2
A1
A0
I/O0 to I/O7
I/O8 to I/O15
I/O16 to I/O23
I/O24 to I/O31
01h
Manufacturer ID: AMD
L
L
H
X
X
V
ID
X
L
X
L
L
Device ID: AM29F010B
L
L
H
X
X
V
ID
X
L
X
L
H
20h
01h (protected)
00h
(unprotected)
Sector Protection Verification
L
L
H
SA
X
V
ID
X
L
X
H
L
LEGEND:
L = Logic Low = V
IL
, H = Logic High = V
IH
, SA = Sector Address, X = Don’t care.
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