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參數(shù)資料
| 型號(hào)： | AS9C25256M2036L-200BC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| 中文描述： | 256K X 36 DUAL-PORT SRAM, 7.5 ns, PBGA256 |
| 封裝： | BGA-256 |
| 文件頁(yè)數(shù)： | 1/30頁(yè) |
| 文件大?。?/td> | 1109K |
| 代理商： | AS9C25256M2036L-200BC |
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September 2004
Preliminary Information
Copyright Alliance Semiconductor. All rights reserved.
AS9C25256M2036L
AS9C25128M2036L
2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface
9/30/04; v.1.3
Alliance Semiconductor
P. 1 of 30
Features
True Dual-Port memory cells that allow simulta-
neous access of the same memory location
Organisation: 262,144/131,072 x 36
[1]
Fully Synchronous, independent operation on
both ports
Selectable Pipeline or Flow-Through output
mode
Fast clock speeds in Pipeline output mode: 250
MHz operation (18Gbps bandwidth)
Fast clock to data access: 2.8ns for Pipeline out-
put mode
Asynchronous output enable control
Fast OE access times: 2.8ns
Double Cycle Deselect (DCD) for Pipeline Out-
put Mode
18/17
[1]
-bit counter with Increment, Hold and
Repeat features on each port
Dual Chip enables on both ports for easy depth
expansion
Interrupt and Collision Detection Features
2.5 V power supply for the core
LVTTL compatible, selectable 3.3V or
2.5V power supply for I/Os, addresses,
clock and control signals on each port
Snooze modes for each port for standby
operation
15mA typical standby current in power
down mode
Available in 256-pin Ball Grid Array
(BGA), 208-pin Plastic Quad Flatpack
(PQFP) and 208-pin fine pitch Ball Grid
Array (fpBGA)
Supports JTAG features compliant with
IEEE 1149.1
Selection guide
Feature
-250
4
250
2.8
150
6.5
TBD
18
-200
5
200
3.4
133
7.5
350
18
-166
6
166
3.6
100
10
300
18
-133
7.5
133
4.2
83
12
260
18
Units
ns
MHz
ns
MHz
ns
mA
mA
Minimum cycle time
Maximum Pipeline clock frequency
Maximum Pipeline clock access time
Maximum flow-through clock frequency
Maximum flow-through clock access time
Maximum operating current
Maximum snooze mode current
Note:
1. AS9C25256M2036L/AS9C25128M2036L
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS9C25128M2036L-200BC | 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200BI | 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25128M2036L-200BI | 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200FC | 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25128M2036L-200FC | IC REG LDO 1.0A 1.5V TO-252 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS9C25256M2036L-200BI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200FC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200FI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200PC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2036L-200PI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
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