參數(shù)資料
          型號: AS80C51-36R
          廠商: TEMIC SEMICONDUCTORS
          元件分類: 微控制器/微處理器
          英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQCC44
          文件頁數(shù): 107/170頁
          文件大小: 4133K
          代理商: AS80C51-36R
          41
          ATtiny4/5/9/10 [DATASHEET]
          8127F–AVR–02/2013
          10.2
          Ports as General Digital I/O
          The ports are bi-directional I/O ports with optional internal pull-ups. Figure 10-2 shows a functional description of
          one I/O-port pin, here generically called Pxn.
          Figure 10-2. General Digital I/O
          Note:
          1. WEx, WRx, WPx, WDx, REx, RRx, RPx, and RDx are common to all pins within the same port. clk
          I/O, and SLEEP
          are common to all ports.
          10.2.1
          Configuring the Pin
          Each port pin consists of four register bits: DDxn, PORTxn, PUExn, and PINxn. As shown in “Register Description”
          on page 50, the DDxn bits are accessed at the DDRx I/O address, the PORTxn bits at the PORTx I/O address, the
          PUExn bits at the PUEx I/O address, and the PINxn bits at the PINx I/O address.
          The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written logic one, Pxn is configured
          as an output pin. If DDxn is written logic zero, Pxn is configured as an input pin.
          clk
          RPx
          RRx
          RDx
          WDx
          WEx
          SYNCHRONIZER
          WDx:
          WRITE DDRx
          WRx:
          WRITE PORTx
          RRx:
          READ PORTx REGISTER
          RPx:
          READ PORTx PIN
          clk
          I/O:
          I/O CLOCK
          RDx:
          READ DDRx
          WEx:
          WRITE PUEx
          REx:
          READ PUEx
          D
          L
          Q
          REx
          RESET
          Q
          D
          Q
          QD
          CLR
          PORTxn
          Q
          QD
          CLR
          DDxn
          PINxn
          D
          A
          TA
          BUS
          SLEEP
          SLEEP:
          SLEEP CONTROL
          Pxn
          I/O
          WPx
          RESET
          Q
          QD
          CLR
          PUExn
          0
          1
          WRx
          WPx:
          WRITE PINx REGISTER
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