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參數(shù)資料
| 型號： | AS80196CA |
| 廠商： | Intel Corp. |
| 英文描述： | ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2.0 |
| 中文描述： | 先進的16位單片機CHMOS集成CAN 2.0 |
| 文件頁數(shù)： | 15/33頁 |
| 文件大?。?/td> | 453K |
| 代理商： | AS80196CA |
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87C196CA/87C196CB
DC CHARACTERISTICS
(Under Listed Operating Conditions) (Continued)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
I
LI
Input Leakage Current (Std. Inputs)
V
SS
k
V
IN
k
V
CC
g
10
m
A
I
LI1
Input Leakage Current (Port 0)
V
SS
k
V
IN
k
V
REF
CA
g
1.5
CB
g
1.0
m
A
V
OH1
SLPINT (P5.4) and HLDA (P2.6)
Output High Voltage in RESET
I
OH
e
0.8 mA
(7)
2.0
V
V
OH2
Output High Voltage in RESET
I
OH
e b
15
m
A
(1)
V
CC
b
1V
V
C
S
Pin Capacitance (Any pin to V
SS
)
f
test
e
1.0 MHz
(6)
10
pF
R
WPU
Weak Pullup Resistance
(Note 6)
150K
X
R
RST
Reset Pullup Resistor
For CB
65K
180K
X
R
RST
Reset Pullup Resistor CA
For CA
6K
65K
X
NOTES:
1. All BD (bidirectional) pins except INST and CLKOUT. INST and CLKOUT are excluded due to their not being weakly
pulled high in reset. BD pins include Port1, Port2, Port3, Port4, Port5 and Port6 except SPLINT (P5.4) and HLDA (P2.6).
2. Standard input pins include XTAL1, EA, RESET, and Port 1/2/5/6 when setup as inputs.
3. All bidirectional I/O pins when configured as Outputs (Push/Pull).
4. Device is static and should operate below 1 Hz, but only tested down to 4 MHz.
5. Maximum I
OL
/I
OH
currents per pin will be characterized and published at a later date.
6. Typicals are based on limited number of samples and are not guaranteed. The values listed are at room temperature and
V
REF
e
V
CC
e
5.0V.
7. Violating these specifications in reset may cause the device to enter test modes (P5.4 and P2.6).
8. When P0 is used as analog inputs, refer to A/D specifications for this characteristic.
9. For temperatures
k
100
§
C typical is 10
m
A.
8XC196CB ADDITIONAL BUS TIMING MODES
The 8XC196CB device has 2 bus timing modes for
external memory interfacing.
MODE 3:
Mode 3 is the standard timing mode. Use this mode
for systems that emulate the 8XC196KR bus tim-
ings.
MODE 0:
Mode 0 is the standard timing mode, but 1 (mini-
mum) wait state is always inserted in external bus
cycles.
15
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