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參數(shù)資料
| 型號(hào)： | AS7C513B-20TI |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 5V 32K x 16 CMOS SRAM |
| 中文描述： | 32K X 16 STANDARD SRAM, 20 ns, PDSO44 |
| 封裝： | 18.40 X 10.20 MM, TSOP2-44 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 213K |
| 代理商： | AS7C513B-20TI |
AS7C513B
3/26/04, v.1.3
Alliance Semiconductor
P. 4 of 9
Key to switching waveforms
Rising input
Read waveform 1 (address controlled)
3,6,7,9
Read waveform 2 (CE, OE, UB, LB controlled)
3,6,8,9
CE low to output in low Z
t
CLZ
t
CHZ
t
OLZ
t
BA
t
BLZ
t
BHZ
t
OHZ
t
PU
t
PD
3
–
3
–
3
–
3
–
ns
4 , 5
CE high to output in high Z
–
4
–
5
–
6
–
7
ns
4 , 5
OE low to output in low Z
0
–
0
–
0
–
0
–
ns
4 , 5
Byte select access time
–
5
–
6
–
7
–
8
ns
Byte select Low to low Z
0
–
0
–
0
–
0
–
ns
4 , 5
Byte select High to high Z
–
5
–
6
–
6
–
7
ns
4 , 5
OE high to output in high Z
–
4
–
5
–
6
–
7
ns
4 , 5
Power up time
0
–
0
–
0
–
0
–
ns
4 , 5
Power down time
–
10
–
12
–
15
20
ns
4 , 5
Parameter
Symbol
-10
-12
-15
-20
Unit
Notes
Min
Max
Min
Max
Min
Max
Min
Max
Undefined output/don’t care
Falling input
t
OH
t
AA
t
RC
t
OH
Data OUT
Address
Data valid
Previous data valid
Data valid
t
RC
t
AA
t
BLZ
t
BA
t
OE
t
OLZ
t
OH
t
OHZ
t
HZ
t
BHZ
t
ACE
t
LZ
Address
OE
CE
LB, UB
Data OUT
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