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參數(shù)資料
| 型號： | AS7C513B-20TI |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 5V 32K x 16 CMOS SRAM |
| 中文描述： | 32K X 16 STANDARD SRAM, 20 ns, PDSO44 |
| 封裝： | 18.40 X 10.20 MM, TSOP2-44 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 213K |
| 代理商： | AS7C513B-20TI |
AS7C513B
3/26/04, v.1.3
Alliance Semiconductor
P. 3 of 9
Recommended operating conditions
V
IL
min = -1.0V for pulse width less than 5ns
V
IH
max = V
CC
+2.0V for pulse width less than 5ns.
DC operating characteristics (over the operating range)
1
Capacitance (f = 1MHz, T
a
= 25
o
C, V
CC
= NOMINAL)
2
Parameter
Read cycle (over the operating range)
3,9
Parameter
Symbol
Min
Typical
Max
Unit
Supply voltage
V
CC
V
IH
V
IL
T
A
T
A
4.5
5
5.5
V
Input voltage
2.2
–
V
CC
+ 0.5
0.8
–0.5
–
V
Ambient operating temperature
commercial
0
–
70
° C
industrial
–40
–
85
° C
Parameter
Sym
Test conditions
-10
-12
-15
-20
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Input leakage
current
|
I
LI
|
V
CC
= Max
V
IN
= GND to V
CC
V
CC
= Max
V
OUT
= GND to V
CC
–
1
–
1
–
1
–
1
μA
Output leakage
current
|
I
LO
|
–
1
–
1
–
1
–
1
μA
Operating
power supply
current
I
CC
V
CC
= Max, CE
≤
V
IL
f = f
Max
, I
OUT
= 0mA
–
110
–
100
–
90
–
80
mA
Standby power
supply current
I
SB
V
CC
= Max, CE
≥
V
IH
f = f
Max
V
CC
=
Max, CE
≥
V
CC
- 0.2V
V
IN
≤
0.2V or
V
IN
≥
V
CC
–0.2V, f = 0
I
OL
= 8 mA, V
CC
= Min
I
OH
= –4 mA, V
CC
= Min
–
50
–
45
–
45
–
40
mA
I
SB1
–
10
–
10
–
10
–
10
mA
Output voltage
V
OL
V
OH
–
0.4
–
0.4
–
0.4
–
0.4
V
2.4
–
2.4
–
2.4
–
2.4
–
V
Symbol
Signals
Test conditions
Max
Unit
Input capacitance
C
IN
C
I/O
A, CE, WE, OE, LB, UB
V
in
= 0V
V
in
= V
out
= 0V
5
pF
I/O capacitance
I/O
7
pF
Parameter
Symbol
-10
-12
-15
-20
Unit
Notes
Min
Max
Min
Max
Min
Max
Min
Max
Read cycle time
t
RC
t
AA
t
ACE
t
OE
10
–
12
–
15
–
20
–
ns
Address access time
–
10
–
12
–
15
–
20
ns
3
Chip enable (CE) access time
–
10
–
12
–
15
–
20
ns
3
Output enable (OE) access time
–
5
–
6
–
7
–
8
ns
Output hold from address
change
t
OH
3
–
3
–
3
–
3
–
ns
5
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