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參數(shù)資料
| 型號(hào)： | AS7C33512PFS16A |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 3.3V 512K×16 Pipeline Burst Synchronous SRAM(3.3V 512K×16流水線脈沖同步靜態(tài)RAM) |
| 中文描述： | 3.3為512k × 16管道爆裂同步SRAM的電壓（3.3V為512k × 16流水線脈沖同步靜態(tài)內(nèi)存） |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大?。?/td> | 215K |
| 代理商： | AS7C33512PFS16A |
March 2001
Advance Information
Copyright Alliance Semiconductor. All rights reserved.
AS7C33512PFS16A
AS7C33512PFS18A
3/13/01;
v.0.9
Alliance Semiconductor
1
3.3V 512K
×
16/18 pipeline burst synchronous SRAM
Features
Organization: 524,288 words × 16 or 18 bits
Fast clock speeds to 166 MHz in LVTTL/LVCMOS
Fast clock to data access: 3.5/3.8/4.0/5.0 ns
Fast OE access time: 3.5/3.8/4.0/5.0 ns
Fully synchronous register-to-register operation
“Flow-through” mode
Single-cycle deselect
- Dual-cycle deselect also available (AS7C33512PFD16A/
AS7C33512PFD18A)
Pentium
*
compatible architecture and timing
Logic block diagram
Asynchronous output enable control
Economical 100-pin TQFP package
Byte write enables
Multiple chip enables for easy expansion
3.3V core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
30 mW typical standby power in power down mode
NTD
*
pipeline architecture available
(AS7C33512NTD16A/AS7C33512NTD18A)
Selection guide
*
Pentium
is a registered trademark of Intel Corporation. NTD is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are
the property of their respective owners.
AS7C33512PFS16A
–166
AS7C33512PFS16A
–150
AS7C33512PFS16A
–133
AS7C33512PFS16A
–100
Units
Minimum cycle time
6
6.7
7.5
10
ns
Maximum pipelined clock frequency
166.7
150
133.3
100
MHz
Maximum pipelined clock access time
3.5
3.8
4
5
ns
Maximum operating current
475
450
425
325
mA
Maximum standby current
130
110
100
90
mA
Maximum CMOS standby current (DC)
30
30
30
30
mA
Burst logic
CLK
ADSC
ADSP
LBO
CLK
CS
CLR
18
16
18
A[18:0]
19
CLK
Address
D
CS
Q
512K × 16/18
Memory
array
16/18
16/18
CLK
D
Bregisters
D
Q
registers
CLK
Q
Enable
CE
D
Q
Enable
rdelay
CLK
D
Q
Output
registers
CLK
Input
registers
Power
down
DATA [17:0]
DATA [15:0]
2
CE0
CE2
BW
b
BW
a
OE
ZZ
FT
CLK
BWE
GWE
Pin arrangement
L
A
A
A
A
A
A
N
N
V
S
V
D
N
A
A
A
A
A
A
A
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
5
1
9
9
9
9
9
9
9
9
9
9
8
8
8
8
8
8
8
8
8
A
A
C
C
N
N
B
B
C
V
D
V
S
C
G
B
O
A
A
A
A
A
A
NC
NC
NC
V
DDQ
V
NC
NC
DQb
DQb
V
SSQ
V
DQb
DQb
FT
V
DD
NC
V
SS
DQb
DQb
V
DDQ
V
DQb
DQb
DQpb/NC
NC
V
SSQ
V
DDQ
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A17
NC
NC
V
DDQ
V
SSQ
NC
DQpa/NC
DQa
DQa
V
SSQ
V
DDQ
DQa
DQa
VSS
NC
V
DD
ZZ
DQa
DQa
V
DDQ
V
SSQ
DQa
DQa
NC
NC
V
SSQ
V
DDQ
NC
NC
NC
TQFP 14 × 20mm
Note: pins 24, 74 are NC for ×16.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C33512PFS18A | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQC | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQCN | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQI | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQIN | 3.3V 512K x 18 pipeline burst synchronous SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C33512PFS18A | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQIN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
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