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參數(shù)資料
| 型號： | AS7C164-15 |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | High Speed CMOS Logic Triple 3-Input AND Gates 14-SOIC -55 to 125 |
| 中文描述： | 5V的8K的× 8 CMOS SRAM的 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 224K |
| 代理商： | AS7C164-15 |
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10 CE1 or WE must be High or CE2 Low during address transitions. Either CE or WE asserting high terminates a write cycle.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 CE1 and CE2 have identical timing.
13 2V data retention applies to the commercial operating range only.
14 C = 30pF, except on High Z and Low Z parameters, where C = 5pF.
During V
CC
power-up, a pull-up resistor to V
CC
on CE1 is required to meet I
SB
specification.
This parameter is sampled, but not 100% tested.
For test conditions, see
AC Test Condtions
, Figures A, B, and C.
t
CLZ
and t
CHZ
are specified with CL = 5pF as in Figures B or C. Transition is measured
±
500mV from steady-state voltage.
This parameter is guaranteed, but not 100% tested.
WE is High for read cycle.
CE1 and OE are Low and CE2 is High for read cycle.
Address valid prior to or coincident with CE1 transition Low and CE2 transition High.
All read cycle timings are referenced from the last valid address to the first transitioning address.
Parameter
V
CC
for data retention
Data retention current
Chip enable to data retention time
Operation recovery time
Symbol
V
DR
I
CCDR
t
CDR
t
R
Test conditions
Min
2.0
–
0
t
RC
Max
–
60
–
–
Unit
V
μA
ns
ns
V
CC
= 2.0V
CE1
≥
V
CC
–0.2V
or
CE2
≤
0.2V
V
CC
CE1
t
R
t
CDR
Data retention mode
V
CC
V
CC
V
DR
≥
2.0V
V
IH
V
IH
V
DR
CS2
t
R
t
CDR
V
IH
V
IH
V
DR
- Output load: see Figure B or Figure C.
- Input pulse level: GND to 3.0V. See Figure A.
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
10%
90%
10%
90%
GND
+3.0V
Figure A: Input pulse
2ns
255
C
(14)
480
D
GND
+5V
Figure B: 5V Output lo
255
C
(14)
320
D
GND
+5V
Figure C: 3.3V Output load
168
Thevenin Equivalent:
D
+1.728V (5V)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C164-15JC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 8K X 8 CMOS SRAM |
| AS7C164-15JCN | 功能描述:靜態(tài)隨機存取存儲器 Fast Asynch 5V 8Kx8 15ns 64K RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C164-15JCNTR | 功能描述:靜態(tài)隨機存取存儲器 64K Fast 8K x 8 5V Asynch RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C164-15PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| AS7C164-20 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 8K X 8 CMOS SRAM |
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