- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381310 > AS5501 (AUSTRIAMICROSYSTEMS AG) ER 4C 4#8 SKT RECP BOX PDF資料下載
參數(shù)資料
| 型號： | AS5501 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | ER 4C 4#8 SKT RECP BOX |
| 中文描述： | 2.4 kbps DATA, MODEM, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 17/26頁 |
| 文件大小： | 315K |
| 代理商： | AS5501 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
Fin/Fbaud
typ. Gain
0.75
-3.0dB
1.3
-25dB
A comparator with hysteresis of appr. 200mV and adjustable (bias-distortion wafer-sort-trim)
absolute reference is converting the DataFilter-output to RXDA (asynchronous receive data).
1.3.6 Bit Error Rate
The system specification of BER is the following:
Parameter
BER1 Bit Error Rate with
Minimum Input Level
BER3 Bit Error Rate with
Maximum Input Level
BER4 Bit Error Rate with
Medium Input Level
BER5 Bit Error Rate with
Impulsive Noise
Condition
min
typ
5*10
-5
max
10
-3
White Noise with S/N=13dB
RXL = 1.5mVrms
White Noise with S/N=25dB
RXL = 1.5Vrms
White Noise with S/N=13dB
RXL = 600mVrms
Noise: 5Vpp rect., 100Hz,
DC=10%, Trise/fall=10us;
RXL=90mVrms
Noise: sine carrier w. 80% AM;
Fmod=1kHz, special S/N-Mask
RXL=1.5Vrms
10
-7
10
-3
10
-6
10
-3
10
-3
BER6 Bit Error Rate with
Modulated Sinusoidal Noise
10
-3
1.3.7 CKR-GEN
There is a digital pll for receive-clock reconstruction. The signal RXDA (async. RXD) gets
synchronised by this clock which then gives the synchronous receive data signal RXD.
A multiplexer is used to select RXDA or RXD to be transferred to the pin RXD by the use of
a control bit "ASYN". The signal RXDA is used to verify the Mixer and DataFil-structure.
A second multiplexer selects CKRX or CKTX to be transferred to pin CLKR/T by the use of
control signal "TxEn". In synchronouse-mode RXD is valid at the high going edge of
CKR/T.
1.4 TEST-MUX
A test-input pin, a test-output pin with attached buffer and multiplexers are used to have
access to some internal nodes for testing. To have access to internal nodes of the receiver in
normal receive operation, the bit TEST_D6 can be set to H for avoiding TST_IN function.
The asic is forced to one of these test-modes by setting the control-bits TEST1 and TEST2.
Test1 Test2 Mux-State
TST-IN
TST-OUT CKSYS Reset-Delay TX-Timeout
0
0
0
bypass timer
VREF
MCLK/2
300ms
3sec
1
0
1
IFI
IFO
FSK_ZC
300ms
3sec
0
1
2
TXI
RXO
SC-CLK
1.17ms
11.7ms
1
1
3
DPLL-IN
DFO
Fmixer
1.17ms
11.7ms
Mux-State 0 (Normal Operation): In normal operation the test-muxes are in position 0. In
this configuration, the reference voltage VREF (2.5V) is present at pin TST-OUT.
In this mode the reset and TX-timeout counter are bypassed with TST-IN set to H.
AS5501 / AS5502 Multimode Powerline Modem
Data Sheet
Rev A, May 2000
Page 16/25
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS5502 | Multimode Powerline-Modem |
| AS6UA25616 | 2.3V to 3.6V 256K×16 Intelliwatt low-power CMOS SRAM with one chip enable(2.3V 到 3.6V 256K×16 Intelliwatt 低功耗 CMOS 靜態(tài)RAM（帶單片使能）) |
| AS6UA25616-BC | 2.3V to 3.6V 256K】16 Intelliwatt⑩ low-power CMOS SRAM with one chip enable |
| AS6UA25616-BI | 2.3V to 3.6V 256K】16 Intelliwatt⑩ low-power CMOS SRAM with one chip enable |
| AS6UA25616-TC | 2.3V to 3.6V 256K】16 Intelliwatt⑩ low-power CMOS SRAM with one chip enable |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS5502 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:Multimode Powerline-Modem |
| AS5-50R0-F | 制造商:TT Electronics / IRC 功能描述: |
| AS550R0JLF | 功能描述:線繞電阻器 - 透孔 50 OHM 5% 5W RoHS:否 制造商:Bourns 電阻:10 Ohms 容差:5 % 功率額定值:7 W 溫度系數(shù):200 PPM / C 系列:FW 端接類型:Axial 工作溫度范圍:- 55 C to + 155 C 尺寸:9.5 mm Dia. x 26 mm L 封裝:Ammo 產(chǎn)品:Power Resistors Wirewound High Energy |
| AS5510 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:Linear Hall Sensor with IC Output |
| AS5510 AB | 制造商:ams 功能描述:Adapter Board |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。