23 - 34
AS3932
Datasheet - Detailed Description
If the preamble is detected correctly the correlator keeps searching for a data pattern. The duration of the preamble plus the pattern should not
be longer than 40 bits (see bit rate definition in
Table 19
). The data pattern can be defined by the user and consists of two bytes which are stored
in the registers
R5<7:0>
and
R6<7:0>
. The two bytes define the pattern consisting of 16 half bit periods. This means the pattern and the bit
period can be selected by the user. The only limitation is that the pattern (in combination with preamble) must obey Manchester coding and
timing. It must be noted that according to Manchester coding a down-to-up bit transition represents a symbol "0", while a transition up-to-down
represents a symbol "1". If the default code is used (96 [hex]) the binary code is (10 01 01 10 01 10 10 01). MSB has to be transmitted first.
The user can also select (
R1<2>
) if single or double data pattern is used for wake-up. In case double pattern detection is set, the same pattern
has to be repeated 2 times.
Additionally it is possible to set the number of allowed missing zero bits (not symbols) in the received bitstream (
R2<6:5>
), as shown in the
Table 20
.
If the pattern matches the wake-up, interrupt is displayed on the WAKE output.
If the pattern detection fails, the internal wake-up (on all active channels) is terminated with no signal sent to MCU and the false wake-up register
will be incremented (
R13<7:0>
).
8.6 Wake-up Protocol - Carrier Frequency 125 kHz
The wake-up state is terminated with the direct command ‘clear_wake’
Table 12
. This command terminates the MCU activity. The termination
can also be automatic in case there is no response from MCU. The time out for automatic termination is set in a register
R7<7:5>
, as shown in
the
Table 21
.
1
1
1
0
1
30
1092
546
1
1
1
1
0
31
1056
528
1
1
1
1
1
32
1024
512
Table 20. Allowed Pattern Detection Errors
R2<6>
R2<5>
Maximum allowed error in the pattern detection
0
0
No error allowed
0
1
1 missed zero
1
0
2 missed zeros
1
1
3 missed zeros
Table 21. Timeout Setup
R7<7>
R7<6>
R7<5>
Time out
0
0
0
0 sec
0
0
1
50 msec
0
1
0
100 msec
0
1
1
150 msec
1
0
0
200 msec
1
0
1
250 msec
1
1
0
300 msec
1
1
1
350 msec
Table 19. Bit Rate Setup
R7<4>
R7<3>
R7<2>
R7<1>
R7<0>
Bit duration in RTC
clock periods
Bit rate (bits/s)
Symbol rate (Manchester
symbols/s)