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參數(shù)資料
| 型號： | AS4C256K16E0-30JC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 5V 256Kx16 CMOS DRAM (EDO) |
| 中文描述： | 256K X 16 EDO DRAM, 30 ns, PDSO40 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-40 |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 644K |
| 代理商： | AS4C256K16E0-30JC |
Copyright Alliance Semiconductor. All rights reserved.
AS4C256K16E0
5V 256K×16 CMOS DRAM (EDO)
4/11/01; v.1.1
Alliance Semiconductor
1 of 24
Features
Organization: 262,144 words × 16 bits
High speed
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
Low power consumption
- Active:
500 mW max (AS4C256K16E0-25)
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
EDO page mode
Refresh
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device
only. Contact Alliance for more information.
Read-modify-write
TTL-compatible, three-state I/O
JEDEC standard packages
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
5V power supply
Latch-up current > 200 mA
Pin arrangement
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
A
SOJ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Vcc
I/O0
I/O1
I/O2
I/O3
Vcc
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
Vcc
V
I/O0
I/O1
I/O2
I/O3
V
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
V
CC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
44
43
42
41
40
39
38
37
36
35
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
13
14
15
16
17
18
19
20
21
22
TSOP II
A
Pin designation
Pin(s)
Description
A0 to A8
Address inputs
RAS
Row address strobe
I/O0 to I/O15
Input/output
OE
Output enable
UCAS
Column address strobe, upper byte
LCAS
Column address strobe, lower byte
WE
Read/write control
Power (5V
±
0.5V)
V
CC
GND
Ground
Selection guide
Shaded areas contain advance information.
Symbol
AS4C256K16E0-30
AS4C256K16E0-35
AS4C256K16E0-50
Unit
Maximum
RAS
access time
t
RAC
t
CAA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC2
30
35
50
ns
Maximum column address access time
16
18
25
ns
Maximum
CAS
access time
10
10
10
ns
Maximum output enable (
OE
) access time
10
10
10
ns
Minimum read or write cycle time
65
70
85
ns
Minimum EDO page mode cycle time
12
14
25
ns
Maximum operating current
180
160
140
mA
Maximum CMOS standby current
2.0
2.0
2.0
mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS4C256K16E0-35 | 5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-35JC | 5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-50 | 5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-50JC | 5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0 | 5V 256K×16 CMOS DRAM (EDO)(5V 256K×16 CMOS動(dòng)態(tài)RAM（擴(kuò)展數(shù)據(jù)總線）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS4C256K16E0-35 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-35JC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-45JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EDO Page Mode DRAM |
| AS4C256K16E0-50 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E050JC | 制造商:Alliance Memory Inc 功能描述: |
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