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參數(shù)資料
| 型號(hào)： | AS3931 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 微波射頻器件 |
| 英文描述： | 3D Low Power Wakeup Receiver |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO16 |
| 文件頁(yè)數(shù)： | 8/30頁(yè) |
| 文件大?。?/td> | 822K |
| 代理商： | AS3931 |
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AS3931
Datasheet - Electrical Characteristics
TDVCH
Data valid to pos. Clock
edge
V
REG
= 2.4 V to 3.5 V
11
100
ns
TCHDI
pos. Clock edge to Data
invalid
V
REG
= 2.4 V to 3.5 V
11
100
ns
TSHCH
Select active to pos. Clock
edge
V
REG
= 2.4 V to 3.5 V
11
100
ns
TCHSL
pos. Clock to Select
inactive
V
REG
= 2.4 V to 3.5 V
11
100
ns
TSL
Select low time
V
REG
= 2.4 V to 3.5 V
11
500
ns
1. The half-bit rate correlates with the crystal oscillator clock frequency f
clk
as follows: B
R
= f
CLK
/12
2. The Manchester bit rate correlates with the Half-Bit Rate as follows: B
M
= B
R
/2
3. Code word can be changed by metal option
4. 8 preamble half-bits are equivalent to 4 manchester bits
5. VREG output may not be used as a supply for other circuits
6. This is the internal Power on Reset time generated by the chip. To ensure proper start-up conditions, the supply voltage VCC must be
ramped up to its final value during TPOR
7. This is the additional operating current when the RSSI buffer is activated without load
8.
Δ
V
CC
means a
hard step of the supply voltage down to a lower value by an amount of
Δ
V
CC
; after such a step, the analog circuits in the
chip take some time to recover for working properly again. The maximumstep value is listed.
9. Crystal tolerance: 100ppm
10.Values refer to production test
11.If regulator is on, then V
REG
= 2.4 V; If regulator is off, then V
REG
= V
CC
, where V
CC
= 2.4 V to 3.5 V
12.The RSSI step is the change of the RSSI output voltage when the input signal amplitude changes from0 to specified value
13.Time to step frominitial RSSI value to 95% of the final value
14.ChA may be any channel 1 – 3, whereas ChB may be any other remaining channel.
Table 3. Electrical Characteristics
Symbol
Parameter
Conditions
Mn
Typ
Max
Units
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS3932-BTST | Programmable 3D LF Receiver; Package Type: TSSOP-16; Temperature Range: -40 - +85 °C; Supply Voltage: 2,40-3,60 |
| AS3932-BQFT | Programmable 3D LF Receiver; Package Type: QFN(4x4)-16; Temperature Range: -40 - +85 °C; Supply Voltage: 2,40-3,60 |
| AS4C1M16E5 | 5V 1M×16 CMOS DRAM (EDO)(5V 1M×16 CMOS動(dòng)態(tài)RAM（擴(kuò)展數(shù)據(jù)總線）) |
| AS4C1M16F5 | 5V 1M×16 CMOS DRAM (Fast-page Mode)(5V 1M×16 CMOS動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
| AS4C256K16E0-50TC | 5V 256Kx16 CMOS DRAM (EDO) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS3931 DB | 制造商:AMS 功能描述:BOARD DEMO FOR AS3931 制造商:AMS 功能描述:Demoboard for AS3931 3D Low Power Wakeup Receiver |
| AS39310FLF | 制造商:TT Electronics / IRC 功能描述:AS39310FLF |
| AS39310HLF | 制造商:TT Electronics / IRC 功能描述:AS39310HLF |
| AS39310JLF | 制造商:TT Electronics / IRC 功能描述:AS39310JLF |
| AS39311FLF | 制造商:TT Electronics / IRC 功能描述:AS39311FLF |
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