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| 型號(hào)： | AS1533-T |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | ADC |
| 英文描述： | 12-Bit, 4-CH, ADC, 300ksps; Package Type: TSSOP-16 |
| 封裝： | TSSOP-16 |
| 文件頁(yè)數(shù)： | 6/28頁(yè) |
| 文件大?。?/td> | 920K |
| 代理商： | AS1533-T |
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www.austriamicrosystems.com
Revision 1.00
6 - 28
AS1532/AS1533
Data Sheet
- Electrical Characteristics
C
BYPREF
ADJ
Capacitive Bypass at
REFADJ
REFADJ Output Voltage
REFADJ Input Range
REFADJ Buffer Disable
Threshold
Buffer Voltage Gain
0.01
10
μF
1.22
±100
V
mV
For small adjustments, from 1.22V
To power down the internal reference
1.4
V
DD1
-
1
V
2.045
V/V
External Reference
: Reference buffer disabled, reference applied to pin REF
REF Input Voltage Range
8
1.0
V
DD1
+
50mV
V
REF Input Current
V
REF
= 2.50V,
f
SCLK
= 6.4MHz
V
REF
= 2.50V, f
SCLK
= 0
Power-Down, f
SCLK
= 0
200
350
μA
320
5
Digital Inputs
: DIN, SCLK, CSN
V
INH
Input High Voltage
0.7 x
V
DD
V
V
INL
Input Low Voltage
0.3 x
V
DD
V
V
HYST
I
IN
C
IN
Digital Outputs
: DOUT, SSTRB
V
OL
Output Voltage Low
V
OH
Output Voltage High
I
L
Tri-State Leakage Current
C
OUT
Tri-State Output Capacitance
Power Supply
V
DD1
,
V
DD2
,
V
DD3
Input Hysteresis
Input Leakage
Input Capacitance
0.2
V
μA
pF
V
IN
= 0 or V
DD2
-1
+1
5
I
SINK
= 5mA
I
SOURCE
= 1mA
CSN = V
DD2
CSN = V
DD2
0.45
V
V
μA
pF
4
-10
+10
5
Positive Supply Voltage
9
4.5
5.5
V
I
VDD1
,
I
VDD2
,
I
VDD3
Supply Current
V
DD1
= V
DD2
=
V
DD3
= 5.5V
Normal Operation with
External Reference
10
Normal Operation with
Internal Reference
10
Reduced-Power Mode
11
Full Power-Down Mode
2.8
3.3
mA
3.3
3.8
0.4
0.8
0.5
2
μA
PSR
Power-Supply Rejection
V
DD1
= V
DD2
= V
DD3
= 5V ±10%
-2
±0.1
+2
mV
1. Tested at V
DD1
= V
DD2
= V
DD3
= +5V, COM = GND, bit
RANGE (page 15)
= 1, single-ended input mode.
2. Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error
and offset error have been nulled.
3. Offset nulled.
4. Ground on channel; sinewave applied to all off channels.
5. Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty
cycle.
6. The absolute voltage range for the analog inputs (CH0:CH3, and COM) is from GND to V
DD1
.
7. External load should not change during conversion for specified accuracy. Guaranteed specification of 4mV/mA
is a result of production test limitations.
8. AS1532/AS1533 performance is limited by the device noise floor, typically 300μVp-p.
Table 3. AS1532 Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS1534 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:12-bit, 8-Channel, Low-Power, 200ksps A/D Converter |
| AS1536 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:12-Bit, Single Supply, Low-Power, 73ksps A/D Converters |
| AS15360204PD | 制造商:Raltron Electronics Corporation 功能描述: |
| AS15360FLF | 制造商:TT Electronics / IRC 功能描述:AS15360FLF |
| AS15360HLF | 制造商:TT Electronics / IRC 功能描述:AS15360HLF |
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