參數(shù)資料
型號： APA2068KAI-TUL
廠商： Anpec Electronics Corporation
英文描述： Stereo 2.6W Audio Power Amplifier (with DC_Volume Control)
中文描述： 立體聲2.6W音頻功率放大器（帶DC_Volume控制）
文件頁數(shù)： 18/27頁
文件大小： 495K
代理商： APA2068KAI-TUL
Copyright
ANPEC Electronics Corp.
Rev. A.2 - Jul., 2005
APA2068
www.anpec.com.tw
18
Application Descriptions ( Cont.)
Ring
Headphone Jack
Sleeve
Control
Pin
Tip
1k
VDD
100k
SE/BTL
Figure 2: SE/BTL input selection by phonejack plug
Figure 3: Gain setting vs VOLUME pin voltage
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
0.0
0.5
1.0
1.5
2.0
DC volume (V)
2.5
3.0
3.5
4.0
4.5
5.0
G
Backw ard
Forw ard
APA2068 DC Volume Control Curve ( BTL)
output impedance state, which configures the
APA2068 as SE driver from OUT+. I
DD
is reduced by
approximately one-half in SE mode.
Control of the SE/BTL input can be a logic-level TTL
source or a resistor divider network or the stereo
headphone jack with switch pin as shown in Application
Circuit.
In Figure 2, input SE/BTL operates as follows :
When the phonejack plug is inserted, the 1k
resistor
is disconnected and the SE/BTL input is pulled high
and enables the SE mode. When the input goes high,
the OUT- amplifier is shutdown causing the speaker to
mute. The OUT+ amplifier then drives through the
output capacitor (C
O
) into the headphone jack. When
there is no headphone plugged into the system, the
contact pin of the headphone jack is connnected from
the signal pin, the voltage divider set up by resistors
100k
and 1k
.Resistor 1k
then pulls low the
SE/BTL pin, enabling the BTL function.
Volume Control Function
APA2068 has an internal stereo volume control whose
setting is a function of the DC voltage applied to the
VOLUME input pin. The APA2068 volume control
consists of 32 steps that are individually selected by
a variable DC voltage level on the VOLUME control
pin. The range of the steps, controlled by the DC
Output SE/BTL Operation (Cont.)
voltage, are from 20dB to -80dB. Each gain step cor-
responds to a specific input voltage range, as shown
in table. To minimize the effect of noise on the volume
control pin, which can affect the selected gain level,
hysteresis and clock delay are implemented. The
amount of hysteresis corresponds to half of the step
width, as shown in volume control graph.
For highest accuracy, the voltage shown in the ‘rec-
ommended voltage’ column of the table is used to
select a desired gain. This recommended voltage is
exactly halfway between the two nearest transitions.
The gain levels are 2dB/step from 20dB to -40dB in
BTL mode, and the last step at -80dB as mute mode.
Input Resistance, Ri
The gain for each audio input of the APA2068 is set by
the internal resistors (Ri and Rf) of volume control
amplifier in inverting configuration.
R
F
Ri
(3)
BTL Gain =-2 x
SE Gain =
R
F
Ri
(2)
A
V
=-
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