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參數(shù)資料
| 型號： | AO4620 |
| 廠商： | ALPHA |
| 英文描述： | Complementary Enhancement Mode Field Effect Transistor |
| 中文描述： | 增強(qiáng)模式互補(bǔ)場效應(yīng)晶體管 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 142K |
| 代理商： | AO4620 |
AO4620
Symbol
STATIC PARAMETERS
Drain-Source Breakdown Voltage
Min
Typ
Max
Units
BV
DSS
-30
V
-1
-5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
±100
-3
nA
V
A
-1
-30
-2
31
42
48
15
38
T
J
=125°C
60
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
S
V
A
-0.77
-1
-2.5
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
980
150
115
2.2
1225
pF
pF
pF
3.3
Q
g
(10V)
Q
g
(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C.
The value in any given application depends on the user's specific board design. The current rating is based on the t
resistance rating.
B: Repetitive rating, pulse width limited by junction temperature.
C. The R
θ
JA
is the sum of the thermal impedence from junction to lead R
θ
JL
and lead to ambient.
D. The static characteristics in Figures 1 to 6 are obtained using <300
μ
s pulses, duty cycle 0.5% max.
E. These tests are performed with the device mounted on 1 in
T
A
=25°C. The SOA curve provides a single pulse rating.
F.The power dissipation and current rating are based on the t
≤
10s thermal resistance rating.
Rev1:Feb 2007
18.7
9.6
3.2
4.8
7.7
6
20
7
21
13
24
nC
nC
nC
nC
ns
ns
ns
ns
26
ns
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=0V, V
DS
=-15V, f=1MHz
Gate Drain Charge
Total Gate Charge (10V)
Total Gate Charge (4.5V)
Gate Source Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-5.3A
V
GS
=-10V, V
DS
=-15V, R
L
=2.8
,
R
GEN
=3
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
m
V
GS
=-4.5V, I
D
=-4.5A
V
DS
=-5V, I
D
=-5.3A
I
S
=-1A,V
GS
=0V
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
μ
A
Gate Threshold Voltage
On state drain current
V
DS
=V
GS
I
D
=-250
μ
A
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-5.3A
V
DS
=-30V, V
GS
=0V
V
DS
=0V, V
GS
=±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
P-CHANNEL Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-5.3A, dI/dt=100A/
μ
s
I
D
=-250
μ
A, V
GS
=0V
I
F
=-5.3A, dI/dt=100A/
μ
s
≤
10s thermal
2
FR-4 board with 2oz. Copper, in a still air environment with
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
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