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參數(shù)資料
| 型號： | AND8112 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | A Quasi-Resonant SPICE Model Eases Feedback Loop Designs |
| 中文描述： | 阿準(zhǔn)諧振SPICE模型反饋環(huán)的設(shè)計更易 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 205K |
| 代理商： | AND8112 |
AND8112/D
http://onsemi.com
3
Averaging Input / Output Voltages
From the inductor voltsecond balance approximation, we know that the average voltage across an inductor operated in a
steadystate converter is null. By looking at the V(L
P
) sketch, we obtain the following equation:
V(LP)
d(t)
Vg(t)
d(t)
V(t)
N
(eq. 8)
d(t)
Vg(t)
(1
d(t))
V(t)
N
0
which lets us extract the classical output / input voltage ratio
V(t)
Vg(t)
N
d(t)
(1
d(t))
(eq. 9)
and as a result, the dutycycle expression:
d(t)
V(t)
N
V(t)
Vg(t)
(eq. 10)
Now, by plugging equation 10 in equation 6, we obtain the average voltage across the primary switch terminal: <V
1(t)
> =
V(t)
N
N
Vg(t)
(1
d(t))
V(t)
N
N
Vg(t)
1
V(t)
N
V(t)
Vg(t)
Vg(t)
(eq. 11)
which agrees with the inductor voltsecond balance approximation (from Figure 1 since, by definition, <V(L
P
)> = 0, then V
g
appears across the switch terminals).
To reveal <V
2(t)
>, let us plug equation 10 into 7: <V
2(t)
> =
[
V(t)
N
Vg(t)
]
d(t)
[
V(t)
N
Vg(t)
]
V(t)
N
V(t)
Vg(t)
V(t)
(eq. 12)
which again could be deduced from Figure 3 since the average voltage across the secondary inductance is zero
…
Averaging Input / Output Currents
The peak inductor current depends on the time during
which V
g
is applied over L
P
. If we recall that this time
(actually
t
on
) is d x T
S
, then:
Vg
LP
From Figure 4, the average current <I
1(t)
> can be obtained
by evaluating the triangular area (charge in Coul
omb
) and
dividing by the switching period. This is expressed by
equation 4. Now plugging equation 13 in 4, we obtain:
Vg(t)
LP
Vg(t)
2
IP
d
TS
(eq. 13)
I1(t)
1
2
d(t)
TS
d(t)
(eq. 14)
d(t)
2
LP
TS
however, from equation 11, we know that <V
1(t)
> = <V
g(t)
>
thus equation 14 turns into:
V1(t)
I1(t)
d(t)
2
LP
TS
2
(eq. 15)
Applying the same technique to the secondary current
I
2(t)
, leads to:
I2(t)
1
TS
TS
d.TS
I2(t)
dt
1
2
IP
N
d(t)
(eq. 16)
plugging equation 13 in 16 leads to:
Vg(t)
I2(t)
d(t)
(1
LP
(1
LP
d(t))
TS
2
N
(eq. 17)
V1(t)
d(t)
d(t))
TS
2
N
A 100% Efficiency Power Transfer
…
Assuming that 100% of the primary stored energy is
released to the secondary side, then we can use equations 11
and 12 to write:
<P
(t)
> = <V
1(t)
> X <I
1(t)
> = <V
2(t)
> X <I
2(t)
>
From equation 15, we can see that a current is generated
by a voltage multiplied by a term. This term is obviously
homogenous to the inverse of an impedance. By
rearranging equation 15, we obtain:
(eq. 18)
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相關(guān)代理商/技術(shù)參數(shù) |
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| AND8116 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Integrated Relay/Inductive Load Drivers for Industrial and Automotive Applications |
| AND8116D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Integrated Relay/Inductive Load Drivers for Industrial and Automotive Applications |
| AND8130 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Analog Switch Allows USB Switching at Low Voltages |
| AND8130/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Analog Switch Allows USB Switching at Low Voltages |
| AND8139 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Ultra-Low Voltage MiniGate Devices Solve 1.2 V Interface Problems |
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