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參數(shù)資料
| 型號(hào)： | AND8020D |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Termination of ECL Logic Devices with EF (Emitter Follower) OUTPUT Structure |
| 中文描述： | ECL邏輯器件的終止與英法（發(fā)射極跟隨器）輸出結(jié)構(gòu) |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 168K |
| 代理商： | AND8020D |
AND8020/D
http://onsemi.com
6
Internal Termination Resistors
Internal termination conveniently uses 50
with the most popular being Z
0
. Note the internal termination
allows the Combo Pin node, V
t
, from the internal resistors to
be connected to an external V
TT
supply, typically at
V
CC
2.0 V, as shown in Figure 5. Alternatively, this Combo
Pin may be pulled to V
EE
through an external resistor to form
a “Y” type termination variant, as shown in Figure 5. See the
“Y Variance” topic and the “Y Term Table” for R
t3
resistor
values.
values for R
t
,
Figure 5. Combo Pin V
TT
or “Y” Connection with
Internal Parallel Termination
V
TT
R
R
(*or twisted pair)
Driver
Receiver
*TLine Z
0
*TLine Z
0
V
TT
Connection
V
EE
R
R
(*or twisted pair)
Driver
Receiver
*TLine Z
0
*TLine Z
0
Y Connection
R
t3
A.
B.
Example Calculations
Ideally, V
TT
supply tracks 1:1 with V
CC
; however, supply
tolerances need to be considered. Assume for instance a
MC10EP16, +85
°
C, nominal +3.3 V
CC
, terminated 50
to V
TT
, where V
TT
is V
CC
2.0 V, or 1.3 V:
IOHmaxof (VCC)
(R
t
)
0.885 V
IOLminof (VCC)
1.685 V
resulting in the nominal case:
IOHmax
(VOHmax
VTT)
Rt
(3.3
0.885)
50
1.3
22.3 mA
IOLmin
(VOLmin
VTT)
Rt
(3.3
1.685)
50
1.3
6.3 mA
If +5% tolerances are assumed, two worst case conditions result.
Case #1: V
CC
min = V
CC
5%, V
TT
max = V
TT
+ 5%
(VOHmax
((3.135
0.885)
50
1.365)
17.7 mA
IOHmax
VTT)
Rt
IOLmin
(VOLmin
VTT)
Rt
((3.135
1.685)
50
1.365)
1.7 mA
Case #2: V
CCmin
+ 5%, V
TTmax
5%
((3.465
0.885)
50
1.235)
26.9 mA
IOHmax
(VOHmax
VTT)
Rt
((3.465
1.685)
50
1.235)
1.09 mA
IOLmin
(VOLmin
VTT)
Rt
Y Variance
The “Y” termination for a differential pair may be
preferred when avoiding the use of a V
TT
supply. The design
is shown in Figure 6 and utilizes the following formulas for
calculating resistor values which are found in the Y Term
Table. The voltage at the Node where R
t1
, R
t2
, and R
t3
connect remains at a static V
TT
voltage of V
CC
2.0 V, or
1.3 V.
Rt1
Rt2
Rt3
Rt1
VTT
VEE
VOH
VOL
2VTT
Z0
(eq. 10)
(eq. 11)
VTT
Rt3( VOH
VOL)
Rt1
( Rt1* VEE)
2Rt3
(eq. 12)
Figure 6. “Y” Variance
Driver
Receiver
*TLine Z
0
*TLine Z
0
V
CC
* or Twisted Pair
R
t1
R
t2
R
t3
C
1
0.10.01 F
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