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| 型號： | AND8009 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | ECLinPS Plus SPICE Modeling Kit |
| 中文描述： | 業(yè)界的EClinPS加SPICE建模套件 |
| 文件頁數(shù)： | 2/67頁 |
| 文件大?。?/td> | 211K |
| 代理商： | AND8009 |
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AND8009/D
http://onsemi.com
2
There are four terminals on all transistor models: Emitter,
Base, Collector, and Substrate (biased to V
EE
). It should be
noted that circuits can be used single ended by replacing INB
with V
BB
. Table 1 describes the nomenclature used in the
schematics and netlists.
To simulate a different operating modes all levels, except
V
CS
, are adjusted with respect to V
CC
. The V
CS
is adjusted
with respect to V
EE
(
V
EE
+ 1.1 V
Table 1. Schematics and Netlist Nomenclature
50 mV)
Parameter
Function Description
V
CC
V
CCO
V
CS
3.3 V FOR LVPECL OR (0 V) FOR LVECL
1.6 V 2.0 V HSTL Output Positive Supply
Internal Reference Voltage (
50 mV)
VEE + 1.1 V
V
HSTL
V
EE
GND
V
TT
IN
INB or IN
Q
QB or Q
HSTL Internal Constant Voltage Source
3.3 V FOR LVECL OR (0 V) FOR LVPECL
0 V
V
CC
2 V TERMINATION PLANE
TRUE INPUT TO CKT
INVERTED INPUT TO CKT
TRUE OUTPUT OF CKT
INVERTED OUTPUT OF CKT
Input Buffer
The Typical Input Buffer schematic (see Table 2) and
netlist are representing structure currently in use on the
existing devices in this family. The schematics require the
addition of ESD models (Figure 15) and package models
(see Table 3) to more accurate model behavior. The internal
input pulldown resistor is shown in the ESD network,
Figure 15. Some devices may also display an internal pullup
resistor to V
CC
. Refer to specific device data sheet pinout
and logic diagram. It is unnecessary to include an ESD or
package model for the V
BB
pins of the models because V
BB
is intended as an internal node for most applications. If V
BB
is modeled as an external node it is usually bypassed because
it is a constant voltage, and adding ESD and Package
parameters provide no additional benefit.
Output Buffer
The output buffer schematics (see Table 2) and netlists
may contain the temperature compensation structure, so
only the ESD and package models need to be added. Any
input or output that is driving or being driven by an off chip
signal should include the ESD and package models. The
output buffers show differential inputs and outputs. When
simulating a single ended output, the termination or load
resistor, package model, ESD structure and output emitter
follower, of the unused output, should not be eliminated to
simplify the system model. The output buffer listing can be
seen in Table 2.
Table 2. Buffer Model Figures
Buffer Model
Figure Number
Page Number
TYPICAL INBUF
3
6
OBUF01
4
7
OBUF02
5
8
OBUF03
6
9
OBUF04
7
10
OBUF05
8
11
OBUF06
9
12
OBUF07
10
13
OBUF08
11
14
OBUF09
12
15
OBUF10
13
16
OBUF11
14
17
Package
A case model for various package types is included to
improve the accuracy of the system model (see Table 3). The
.package model represents the parasitics as they are
measured on a pin. The package pin model should be placed
on each device input pin connecting to an input model, all
device output pins connecting to an output model, V
CC
, and
V
EE
. A model can be used at the V
EE
pin: but is not necessary
since the current in the V
EE
pin is a constant. Explanations
of the Package Model modes can be found in Appendix A.
Table 3. Available Packages
Package Model
Page Number
8Lead SO
22
8Lead TSSOP
24
20Lead SO
26
20Lead TSSOP
32
24Lead QFN
37
32Lead TQFP
43
52Lead LQFP
51
64Lead LQFP
58
EP16 Buffer Model
The EP16 interconnect has been completely modeled to
provide a working schematic and output waveforms as
examples of the ECLinPS Plus line. The typical input buffer
may be driven with the output buffer, OBUF01. (See Figure
17, simplified EP16 SPICE model and Figure 18 typical
output waveform.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AND8009/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:ECLinPS Plus SPICE Modeling Kit |
| AND8010 | 制造商:PURDY 制造商全稱:PURDY 功能描述:LED Displays |
| AND8010-B | 制造商:PURDY 制造商全稱:PURDY 功能描述:LED Displays |
| AND-8010GAL | 制造商:Purdy Electronics Corporation 功能描述:DISPLAY, SEVEN SEGMENT, 20.3MM, GREEN, No. of Digits / Alpha:1, Character Size:2 |
| AND-8010GCL | 制造商:Purdy Electronics Corporation 功能描述:DISPLAY, SEVEN SEGMENT, 20.3MM, GREEN, No. of Digits / Alpha:1, Character Size:2 |
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