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參數(shù)資料
| 型號： | AN2546FH-A |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SOCKET FULL LID LCC 68 POS GOLD |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 21/30頁 |
| 文件大?。?/td> | 520K |
| 代理商： | AN2546FH-A |
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AN2546FH-A
21
SDB00081BEB
Pin No.
Equivalent circuit
Description
Voltage · Waveform
64
VXO2:
PAL and PAL-M crystal os-
cillator connecting pin
Use the capacitor with tem-
perature characteristics
(N750) to connect to the
crystal oscillator.
■
Terminal Equivalent Circuits (continued)
■
Usage Notes
The supply voltage applied to pin 6, pin 25, pin 29, pin 44, and pin 58 must be brought up at the same time.
The crystal oscillator used must be evaluated thoroughly, because chrominance signal processing system characteris-
tics change by the crystal oscillator type.
The conversion of the analog RGB signals and the analog OSD signals with synchronous signals is not supported.
Input the analog RGB signals and the analog OSD signals after filtering the pedestal parts of these signals.
Evaluated thoroughly on the application of this device in PAL.
■
Technical Data
1. Serial interface description
1) I
2
C bus control mode
A serial data is capable of transferring 9-bit unit of 8-bit transfer data and 1-bit answering data using two kinds
of signal lines of data and shift clock.
When a slave address after setting a start condition matches the address on the IC side, you can receive the data
to be transmitted from then. Once the stop condition is set up, the next transmitting data will be ignored until the
start condition is set up.
There are two kinds of transfer mode: an auto-increment mode which does not transmit subaddress, and data
upgrade mode which transmits subaddress + data by 2 bytes.
The typical models of communication sequence are shown below:
(1) Start condition
When the S-data changes from high level to low level at SCLK
=
high level, a data receiving mode becomes
available.
(2) Slave address transfer
The slave address of the AN2546FH-A is 88h.
64
Pin 58
V
CC1
Pin 59
GND
190
1 k
Subaddress transfer
Acknowledge bit
1
Pin 48
S-data
Pin 47
SCLK
2
3
4
5
6
7
8
9
1
2
Start condition
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