
AN-31
8
B
4/03
(above approximately 40 W). Figures 5 and 6 show a non-
dissipative clamp technique that also resets the transformer.
See references [4] and [5] for a description of this technique.
Transformer Reset Circuit
The flux in the magnetizing inductance of the transformer must
be reset in each switching cycle to maintain volt-seconds
balance and prevent saturation. Since real transformers have
finite inductance, they store parasitic energy that is represented
as a magnetizing current.
The magnetizing inductance cannot store very much energy
before it saturates. Since a saturated transformer behaves like a
short circuit, external circuitry must manage the removal of the
energy from the magnetization inductance (reset the transformer)
on each switching cycle.
This transformer reset will require the voltage on the DRAIN
pin to rise above the input voltage. The designer needs to be sure
that the transformer reset does not cause voltage overstress on
the DRAIN pin of the
DPA-Switch.
Figure 4 shows the components for the circuit that resets the
magnetizing energy in the transformer to a safe value at the end
of each switching cycle. The heart of the circuit is the series RC
network (R
S
and C
S
) that is connected across the output rectifier.
When the
DPA-Switch
turns off, current in the magnetizing
inductance leaves the transformer through the secondary
winding. The capacitor charges as the magnetizing current
reduces to zero. The capacitor must be small enough to allow
the magnetizing current to go to zero within the minimum
offtime. An additional restriction on the size of the capacitor is
that it must be large enough to keep the drain-to-source voltage
below the voltage of the Zener clamp under normal operating
conditions. The resistor in the reset network damps oscillations
from the interaction of the capacitor with parasitic inductance.
The value of the resistor is typically between one and five ohms.
A different reset circuit is required for applications higher than
about 40 W. Figure 6 shows an example of a 70 W converter that
uses the circuit of Figure 5 to reset the transformer and to limit
the voltage on the
DPA-Switch
.
Verification of Transformer Reset
Users should confirm that the transformer resets under worst
case conditions at the lowest and highest input voltages with
measurements on the bench. Figure 7 illustrates three situations
that show proper transformer reset with the reset circuit in
Figure 4. Three examples of improper transformer reset are
shown in Figure 8.
Figure 6. A 70 W DC-DC Converter that uses an Alternative Circuit to Reset the Transformer.
U1
42D4
1
9, 10
6, 7
3
2
200 V
2C10
C1
μ
F
1
C2
μ
F
1
C11
68
μ
F
10 V
1C7
R6
6.8
50 V
R3
6.8 k
1 %
6R1
R4
1.0
C18
100
μ
F
10 V
C19
100
μ
F
10 V
C20
1
μ
F
10 V
J1-2
INPUT RTN
J1-1
RTN
+V
36-72 VDC
J1-1
L1
μ
H
1
D
L
S
X
F
C
CONTROL
U2
DPA-Switch
T1
R5
6.8
UD1
UD2
L2
100
μ
H
C9
4.7
μ
F
25 V
BD3
42D5
L3
3.3
μ
H
20 A
J2-2
5 V, 14 A
120 A
150
PI-2882-121302
C5, C6
μ
F,
101
C100
F,
10 V (x5)
U2
BAD5
LM4U3
R9
220
R11
5.1
R8
10 k
C22
1
μ
F
C21
10
μ
F
10 V
C23
R10
11%
11%