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參數(shù)資料
| 型號(hào)： | AN-31 |
| 英文描述： | DPA-Switch Forward Converter Design Guide |
| 中文描述： | 政治部開關(guān)正激變換器的設(shè)計(jì)指南 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 245K |
| 代理商： | AN-31 |
AN-31
12
B
4/03
The objective of the feedback design is to reduce the magnitude
of the loop gain to zero dB at a frequency of 10 kHz or less with
a phase margin near 60 degrees. Although system requirements
and the
DPA-Switch
fix some quantities that determine loop
characteristics, the designer can manipulate many components
in the feedback circuit to optimize loop stability. Figure 8 shows
the essential components of a feedback circuit that uses an
ordinary TL431 regulator to achieve the high loop gain required
for tight DC voltage regulation. Not shown in the circuit
diagram is the ESR of the output capacitors. The ESR is also an
important element in the frequency compensation of the feedback
loop.
Output LC Filter
The filter formed by the output inductor and the output capacitors
contributes two poles to the loop response at the filter’s resonant
frequency. Since the filter is a resonant circuit with relatively
low loss, the gain and phase change rather abruptly near the
resonant frequency. Consequently, the poles and zeros for
shaping the loop response should either avoid this region or
compensate for the resonance.
Proper placement of the resonant frequency of the output filter
will avoid complications in the design of the feedback loop. The
position of the resonant frequency should allow the designer to
shape the desired response with a limited number of
compensation components of reasonable size. The recommended
resonant frequency for an output filter that uses low ESR
tantalum capacitors in a forward converter with
DPA-Switch
and optocoupler feedback is between 4 kHz and 6 kHz. This
value is consistent with the inductor and capacitor values for
desirable ripple current and ripple voltage.
The output capacitor ESR contributes a zero that compensates
for one of the poles from the filter. However, for low ESR
tantalum or organic electrolyte capacitors, this zero usually
occurs too high in frequency to substantially offset the effects
of the filter within the desired loop bandwidth. In the prototype
example, the output filter capacitors are 100
μ
F, with a maximum
specified ESR of 100 milliohms. The ESR zero is thus at
approximately 16 kHz, well beyond the 4 kHz LC filter resonant
frequency. Actual ESR is approximately 80 milliohms, placing
the zero typically at 20 kHz. In situations where standard low
ESR electrolytic capacitors can be used, the higher ESR may
place the ESR zero at a sufficiently low frequency to add
significant additional phase margin.
Figure 10. Gain and Phase of a Typical Feedback Loop for DC-DC Forward Converter with DPA-Switch. Markers Show Locations of Major
Poles and Zeros.
0.1
1
10
100
1 k
10 k
50
60
40
30
20
10
0
-10
-20
-30
-40
-50
-60
100 k
270
240
210
180
150
120
90
60
30
0
-30
-60
-90
PI-2878-032603
180 Degrees Phase
0 Degrees Phase Margin
Phase Margin
60 Degrees
Z1
Gain Margin
20 dB
0 Degrees Phase
180 Degrees Phase Margin
56 dB Loop Gain
0 dB Gain
1-Gain
1-Phase
P1
P2
P3
P4
P6
Z2
Z3
Z4
Frequency (Hz)
G
P
P5
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