參數(shù)資料
型號(hào)： AM50DL128CG85IT
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 存儲(chǔ)器
英文描述： 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA88
封裝： 11.60 X 8 MM, FBGA-88
文件頁(yè)數(shù)： 48/63頁(yè)
文件大?。?/td> 464K
代理商： AM50DL128CG85IT
November 7, 2002
Am50DL128CG
47
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
OE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
CE#f
Note:
1. VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read
cycle, and array data read cycle.
2. CE#f refers to active flash device being addressed (either CE#f1 or CE#f2). The chip enable input of the inactive flash
device must be held high during this operation.
Figure 22.
Toggle Bit Timings (During Embedded Algorithms)
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#f to
toggle DQ2 and DQ6.
Figure 23.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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